Evaluation of the Masked Logic Style MDPL on a Prototype Chip. - Thomas Popp; Mario Kirschbaum; Thomas Zefferer; Stefan Mangard (CHES, 2007)

Evaluation of a DPA-Resistant Prototype Chip. - Mario Kirschbaum; Thomas Popp (ACSAC, 2009)

Practical Attacks on Masked Hardware. - Thomas Popp; Mario Kirschbaum; Stefan Mangard (CT-RSA, 2009)

High-Speed Hardware Implementations of BLAKE, Blue Midnight Wish, CubeHash, ECHO, Fugue, Gröstl, Hamsi, JH, Keccak, Luffa, Shabal, SHAvite-3, SIMD, and Skein. - Stefan Tillich; Martin Feldhofer; Mario Kirschbaum; Thomas Plos; Jörn-Marc Schmidt; Alexander Szekely (IACR Cryptol. ePrint Arch., 2009)

SCA-resistant embedded processors: the next generation. - Stefan Tillich; Mario Kirschbaum; Alexander Szekely (ACSAC, 2010)

Side-Channel Leakage across Borders. - Jörn-Marc Schmidt; Thomas Plos; Mario Kirschbaum; Michael Hutter; Marcel Medwed; Christoph Herbst (CARDIS, 2010)

Algebraic Side-Channel Analysis in the Presence of Errors. - Yossef Oren; Mario Kirschbaum; Thomas Popp; Avishai Wool (CHES, 2010)

Implementation and Evaluation of an SCA-Resistant Embedded Processor. - Stefan Tillich; Mario Kirschbaum; Alexander Szekely (CARDIS, 2011)

Exploiting the Difference of Side-Channel Leakages. - Michael Hutter; Mario Kirschbaum; Thomas Plos; Jörn-Marc Schmidt; Stefan Mangard (COSADE, 2012)

Masked Dual-Rail Precharge Logic Encounters State-of-the-Art Power Analysis Methods. - Amir Moradi 001; Mario Kirschbaum; Thomas Eisenbarth 001; Christof Paar (IEEE Trans. Very Large Scale Integr. Syst., 2012)

On Secure Multi-party Computation in Bandwidth-Limited Smart-Meter Systems. - Mario Kirschbaum; Thomas Plos; Jörn-Marc Schmidt (ARES, 2013)

Analyzing Side-Channel Leakage of RFID-Suitable Lightweight ECC Hardware. - Erich Wenger; Thomas Korak; Mario Kirschbaum (RFIDSec, 2013)

Hardware and VLSI Designs. - Mario Kirschbaum; Thomas Plos (Secure Smart Embedded Devices, Platforms and Applications, 2014)