An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. - Sang-Il Han; Amer Baghdadi; Marius Bonaciu; Soo-Ik Chae; Ahmed Amine Jerraya (DAC, 2004)

An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. - Ferid Gharsalli; Amer Baghdadi; Marius Bonaciu; Giedrius Majauskas; Wander O. Cesário; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2004)

Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. - Aimen Bouchhima; Iuliana Bacivarov; Wassim Youssef; Marius Bonaciu; Ahmed Amine Jerraya (ASP-DAC, 2005)

High-level architecture exploration for MPEG4 encoder with custom parameters. - Marius Bonaciu; Aimen Bouchhima; Mohamed-Wassim Youssef; Xi Chen; Wander O. Cesário; Ahmed Amine Jerraya (ASP-DAC, 2006)

Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. - Florin Dumitrascu; Iuliana Bacivarov; Lorenzo Pieralisi; Marius Bonaciu; Ahmed Amine Jerraya (DATE Designers' Forum, 2006)

Software Performance Estimation in MPSoC Design. - Márcio Oyamada; Flávio Rech Wagner; Marius Bonaciu; Wander O. Cesário; Ahmed Amine Jerraya (ASP-DAC, 2007)

Software for Multi Processor System on Chip: Moving an MPEG4 Decoder from Generic RISC Platforms to CELL. - Ludovic Demontes; Marius Bonaciu; Paul Amblard (IEEE International Workshop on Rapid System Prototyping, 2008)