Modeling of VLSI RC parasitics based on the network reduction algorithm. - Mariusz Niewczas; Adam Wojtasik (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Architecture of a testable analog fuzzy logic controller. - Zbigniew Jaworski; Mariusz Niewczas; Miroslaw Grygolec; Wieslaw Kuzmicz (IEEE Trans. Fuzzy Syst., 1996)

Extension of Inductive Fault Analysis to Parametric Faults in Analog Circuits with Application to Test Generation. - Zbigniew Jaworski; Mariusz Niewczas; Wieslaw Kuzmicz (VTS, 1997)

A pattern matching algorithm for verification and analysis of very large IC layouts. - Mariusz Niewczas; Wojciech Maly; Andrzej J. Strojwas (ISPD, 1998)

An algorithm for determining repetitive patterns in very large IC layouts. - Mariusz Niewczas; Wojciech Maly; Andrzej J. Strojwas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

IC Masks - The Challenges of the Newest Technologies. - Mariusz Niewczas (MIXDES, 2022)