Functional Programming with Side-Effects. - Mark B. Josephs (Sci. Comput. Program., 1986)

Functional programming with side-effects. - Mark B. Josephs (1986)

A State-Based Approach to Communicating Processes. - Mark B. Josephs (Distributed Comput., 1988)

The Data Refinement Calculator for Z Specifications. - Mark B. Josephs (Inf. Process. Lett., 1988)

The Semantics of Lazy Functional Languages. - Mark B. Josephs (Theor. Comput. Sci., 1989)

An Algebra for Delay-Insensitive Circuits. - Mark B. Josephs; Jan Tijmen Udding (CAV, 1990)

Delay-Insensitive Circuits: An Algebraic Approach to their Design. - Mark B. Josephs; Jan Tijmen Udding (CONCUR, 1990)

A Theory of Synchrony and Asynchrony. - Jifeng He 001; Mark B. Josephs; Charles Antony Richard Hoare (Programming Concepts and Methods, 1990)

High-Level Design of an Asynchronous Packet-Routing Chip. - Mark B. Josephs; Rudolf H. Mak; Jan Tijmen Udding; Tom Verhoeff; Jelio Todorov Yantchev (Designing Correct Circuits, 1992)

Receptive Process Theory. - Mark B. Josephs (Acta Informatica, 1992)

Normal Form in a Delay-Insensitive Algebra. - Rix Groenboom; Mark B. Josephs; Paul G. Lucassen; Jan Tijmen Udding (Asynchronous Design Methodologies, 1993)

Implementing a Stack as a Delay-insensitive Circuit. - Mark B. Josephs; Jan Tijmen Udding (Asynchronous Design Methodologies, 1993)

Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra. - Mark B. Josephs; Paul G. Lucassen; Jan Tijmen Udding; Tom Verhoeff (ASYNC, 1994)

Specifying Distributed CICS in Z: Accessing Local and Remote Resources (Short Communication). - Iain S. C. Houston; Mark B. Josephs (Formal Aspects Comput., 1994)

Sequencer circuits for VLSI programming. - Andrew M. Bailey; Mark B. Josephs (ASYNC, 1995)

Low-latency asynchronous FIFO buffers. - Jelio Todorov Yantchev; C. G. Huang; Mark B. Josephs; Ivailo M. Nedelchev (ASYNC, 1995)

Some limitations to speed-independence in asynchronous circuits. - Martin E. Bush; Mark B. Josephs (ASYNC, 1996)

CMOS design of the tree arbiter element. - Mark B. Josephs; Jelio Todorov Yantchev (IEEE Trans. Very Large Scale Integr. Syst., 1996)

The Use of SI-Algebra in the Design of Sequencer Circuits. - Mark B. Josephs; Andrew M. Bailey (Formal Aspects Comput., 1997)

Formal Derivation of a Loadable Asynchronous Counter. - Mark B. Josephs (MPC, 1998)

Protocol Specification, Testing and Verification XV, by Piotr Dembinski and Marek Sredniawa (Editors), Chapman and Hall, 1996 (Book Review). - Mark B. Josephs (Softw. Test. Verification Reliab., 1998)

Applications of asynchronous circuits. - Kees van Berkel 001; Mark B. Josephs; Steven M. Nowick (Proc. IEEE, 1999)

Modeling and design of asynchronous circuits. - Mark B. Josephs; Steven M. Nowick; Kees van Berkel 001 (Proc. IEEE, 1999)

Special Issue On Asynchronous Circuits And Systems. - Steven M. Nowick; Mark B. Josephs; Kees van Berkel 001 (Proc. IEEE, 1999)

Delay-Insensitive Interface Specification and Synthesis. - Mark B. Josephs; Dennis P. Furey (DATE, 2000)

A Programming Approach to the Design of Asynchronous Logic Blocks. - Mark B. Josephs; Dennis P. Furey (Concurrency and Hardware Design, 2002)

Optimal Two-Level Delay - Insensitive Implementation of Logic Functions. - Igor Lemberski; Mark B. Josephs (PATMOS, 2002)

An Analysis of Determinacy Using a Trace-Theoretic Model of Asynchronous Circuits. - Mark B. Josephs (ASYNC, 2003)

Models for Data-Flow Sequential Processes. - Mark B. Josephs (25 Years Communicating Sequential Processes, 2004)

Decomposing specifications with concurrent outputs to resolve state coding conflicts in asynchronous logic synthesis. - Hemangee K. Kapoor; Mark B. Josephs (DAC, 2004)

Modelling and verification of delay-insensitive circuits using CCS and the Concurrency Workbench. - Hemangee K. Kapoor; Mark B. Josephs (Inf. Process. Lett., 2004)

Controllable Delay-Insensitive Processes and their Reflection, Interaction and Factorisation. - Hemangee K. Kapoor; Mark B. Josephs (ACSD, 2005)

Asynchronous Packet-Switching for Networks-on-Chip. - Jun Xu; Reza Sotudeh; Mark B. Josephs (ACSD, 2006)

Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments. - Hemangee K. Kapoor; Mark B. Josephs; Dennis P. Furey (Fundam. Informaticae, 2006)

Gate-level modelling and verification of asynchronous circuits using CSPM and FDR. - Mark B. Josephs (ASYNC, 2007)

Controllable Delay-Insensitive Processes. - Mark B. Josephs; Hemangee K. Kapoor (Fundam. Informaticae, 2007)

Aggregation of security metrics for decision making: a reference architecture. - Yussuf Ahmed; Syed Naqvi; Mark B. Josephs (ECSA (Companion), 2018)

Collective Responsibility and Mutual Coercion in IoT Botnets - A Tragedy of the Commons Problem. - Carolina Adaros Boye; Paul Kearney; Mark B. Josephs (ICETE (1), 2018)

Cyber-Risks in the Industrial Internet of Things (IIoT): Towards a Method for Continuous Assessment. - Carolina Adaros Boye; Paul Kearney; Mark B. Josephs (ISC, 2018)

Continuous Risk Management for Industrial IoT: A Methodological View. - Carolina Adaros Boye; Paul Kearney; Mark B. Josephs (CRiSIS, 2019)

A Research-Led Practice-Driven Digital Forensic Curriculum to Train Next Generation of Cyber Firefighters. - Syed Naqvi; Peter Sommer; Mark B. Josephs (EDUCON, 2019)

Cybersecurity Metrics for Enhanced Protection of Healthcare IT Systems. - Yussuf Ahmed; Syed Naqvi; Mark B. Josephs (ISMICT, 2019)

Towards Blockchain-Based Auditing of Data Exchanges. - Xiaohu Zhou; Antonio Nehme; Vitor Jesus; Yonghao Wang; Mark B. Josephs; Khaled Mahbub (SmartBlock, 2019)

User-Controlled, Auditable, Cross-Jurisdiction Sharing of Healthcare Data Mediated by a Public Blockchain. - Xiaohu Zhou; Vitor Jesus; Yonghao Wang; Mark B. Josephs (TrustCom, 2020)

An Indicators-of-Risk Library for Industrial Network Security. - Carolina Adaros Boye; Paul Kearney; Mark B. Josephs; Hans Ulmer (ARES, 2021)

Intrusion Detection for Industrial Control Systems by Machine Learning using Privileged Information. - Moojan Pordelkhaki; Shereen Fouad; Mark B. Josephs (ISI, 2021)