Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II. - Mark Genoe; Luc J. M. Claesen; Eric Verlind; Frank Proesmans; Hugo De Man (ICCD, 1991)

Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip. - Luc J. M. Claesen; Joan Daemen; Mark Genoe; G. Peeters (ICCD, 1993)

A Parallel Method for Functional Verification of Medium and High Throughput DSP Synthesis. - Mark Genoe; Luc J. M. Claesen; Hugo De Man (ICCD, 1994)

On the use of VHDL-based behavioral synthesis for telecom ASIC design. - Mark Genoe; Paul Vanoostende; Geert van Wauwe (ISSS, 1995)

The Use of Microelectronics for Future Telecom and Multimedia Systems. - Jacques Wenin; Geert van Wauwe; Mark Genoe; Danny Sallaerts (ED&TC, 1996)

How standards will enable hardware/software co-design. - Mark Genoe; Christopher K. Lennard; Joachim Kunkel; Brian Bailey; Gjalt G. de Jong; Grant Martin; M. M. Kamal Hashmi; Shay Ben-Chorin; Anssi Haverinen (CODES, 1999)