Study of substrate noise and techniques for minimization. - Mark Peng (2003)

A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs. - Kush Gulati; Mark Peng; Anurag Pulincherry; Carlos E. Muñoz; Mike Lugin; Alex R. Bugeja; Jipeng Li; Anantha P. Chandrakasan (CICC, 2005)

A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs. - Kush Gulati; Mark Peng; Anurag Pulincherry; Carlos E. Muñoz; Mike Lugin; Alex R. Bugeja; Jipeng Li; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2006)

An Information Reporting Web Service Framework for Integration of Gate-to-Gate Process-to-Energy Metrics. - Lewis John McGibbney; Mark Peng; Kincho H. Law (APMS (1), 2013)

23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques. - Hugh Mair; Gordon Gammie; Alice Wang; Sumanth Gururajarao; Ichiro Lin; HsinChen Chen; Wuan Kuo; Anand Rajagopalan; Wei-Zheng Ge; Rolf Lagerquist; Syed Rahman; C. J. Chung; et al. (ISSCC, 2015)

Player Behavior and Optimal Team Composition for Online Multiplayer Games. - Hao Yi Ong; Sunil Deolalikar; Mark Peng (CoRR, 2015)

4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)