Iterative Methods in Semiconductor Device Simulation. - Conor S. Rafferty; Mark R. Pinto; Robert W. Dutton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985)

Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology. - Enrico Sangiorgi; Mark R. Pinto; Stanley E. Swirhun; Robert W. Dutton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985)

The use of computer aids in IC technology evolution. - Robert W. Dutton; Mark R. Pinto (Proc. IEEE, 1986)

Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances. - Hiroshi Iwai; Mark R. Pinto; Conor S. Rafferty; J. E. Oristian; Robert W. Dutton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

Computation of steady-state CMOS latchup characteristics. - William M. Coughran Jr.; Mark R. Pinto; R. Kent Smith (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs. - Franco Venturi; R. Kent Smith; Enrico Sangiorgi; Mark R. Pinto; Bruno Riccò (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Adaptive grid generation for VSLI device simulation. - William M. Coughran Jr.; Mark R. Pinto; R. Kent Smith (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

The future of solid-state electronics. - William F. Brinkman; Mark R. Pinto (Bell Labs Tech. J., 1997)