A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock. - Peter Nilsson 001; Mats Torkelson; Kent Palmkvist; Mark Vesterbacka; Lars Wanhammar (Mobile Communications, 1994)

Implementation of Fast Bit-Serial Lattice Wave Digital Filters. - Mark Vesterbacka; Kent Palmkvist; Peter Sandberg; Lars Wanhammar (ISCAS, 1994)

Implementation of static DSP algorithms using multiplexed PE: s. - Kent Palmkvist; Mark Vesterbacka; Lars Wanhammar (ICECS, 1996)

Sign-extension and quantization in bit-serial digital filters. - Mark Vesterbacka; Kent Palmkvist; Lars Wanhammar (ICECS, 1996)

A robust differential scan flip-flop. - Mark Vesterbacka (ISCAS (1), 1999)

Glitch minimization and dynamic element matching in D/A converters. - Mikael Karlsson Rudberg; Mark Vesterbacka; Niklas U. Andersson; J. Jacob Wikner (ICECS, 2000)

A static CMOS master-slave flip-flop experiment. - Mark Vesterbacka (ICECS, 2000)

Dynamic element matching in D/A converters with restricted scrambling. - Mark Vesterbacka; Mikael Rudberg; J. Jacob Wikner; Niklas U. Andersson (ICECS, 2000)

Design of encoders for linear-coded D/A converters. - Mark Vesterbacka; J. Jacob Wikner (ISCAS (1), 2001)

A differential DAC architecture with variable common-mode level. - K. Ola Andersson; Niklas U. Andersson; Mark Vesterbacka; J. Jacob Wikner (ISCAS (1), 2002)

A polynomial-based division algorithm. - Robert Hägglund; Per Löwenborg; Mark Vesterbacka (ISCAS (3), 2002)

A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliers. - Magnus Karlsson; Mark Vesterbacka; Wlodek Kulesza (ISCAS (2), 2004)

A high-speed low-latency digit-serial hybrid adder. - Krister Landernäs; Johnny Holmberg; Mark Vesterbacka (ISCAS (3), 2004)

A study of digital decoders in flash analog-to-digital converters. - Erik Säll; Mark Vesterbacka; K. Ola Andersson (ISCAS (1), 2004)

A Parameterized Cell-Based Design Approach for Digital-to-Analog Converters. - K. Ola Andersson; Mark Vesterbacka (IWSOC, 2004)

Design of a Comparator in CMOS SOI. - Erik Säll; Mark Vesterbacka (IWSOC, 2004)

A yield-enhancement strategy for binary-weighted DACs. - K. Ola Andersson; Mark Vesterbacka (ECCTD, 2005)

6 bit 1 GHz CMOS silicon-on-insulator flash analog-to-digital converter for read channel applications. - Erik Säll; Mark Vesterbacka (ECCTD, 2005)

Glitch reduction in digit-serial recursive filters using retiming. - Krister Landernäs; Johnny Holmberg; Mark Vesterbacka (ICECS, 2005)

Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters. - K. Ola Andersson; Mark Vesterbacka (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Effect of Simultaneous Switching Noise on an Analog Filter. - Erik Backenius; Mark Vesterbacka (ICECS, 2006)

Digit-serial/parallel multipliers with improved throughput and latency. - Magnus Karlsson; Mark Vesterbacka (ISCAS, 2006)

Reduction of simultaneous switching noise in analog signal band. - Erik Backenius; Mark Vesterbacka; V. B. Settu (ECCTD, 2007)

Thermometer-to-binary decoders for flash analog-to-digital converters. - Erik Säll; Mark Vesterbacka (ECCTD, 2007)

Calibration of high-resolution flash ADCS based on histogram test methods. - Armin Jalili; Sayed Masoud Sayedi; J. Jacob Wikner; Kent Palmkvist; Mark Vesterbacka (ICECS, 2010)

Reduction of Substrate Noise in Sub Clock Frequency Range. - S. M. Yasser Sherazi; Shahzad Asif; Erik Backenius; Mark Vesterbacka (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Frequency control schemes for single-ended ring oscillators. - Muhammad Touqir Pasha; Mark Vesterbacka (ECCTD, 2011)

Performance analysis of radix-4 adders. - Shahzad Asif; Mark Vesterbacka (Integr., 2012)

A modified switching scheme for multiplexer based thermometer-to-binary encoders. - Muhammad Touqir Pasha; Mark Vesterbacka (NORCHIP, 2014)

A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture. - Niklas U. Andersson; Mark Vesterbacka (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Time-Mode Analog-to-Digital Conversion Using Standard Cells. - Vishnu Unnikrishnan 001; Mark Vesterbacka (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Power-efficient time-to-digital converter for all-digital frequency locked loops. - Muhammad Touqir Pasha; Niklas U. Andersson; Mark Vesterbacka (ECCTD, 2015)

Linearization of synthesizable VCO-based ADCs using delta modulation. - Vishnu Unnikrishnan 001; Mark Vesterbacka (ECCTD, 2015)

A fully synthesized all-digital VCO-based analog-to-digital converter. - Vishnu Unnikrishnan 001; Srinivasa Rao Pathapati; Mark Vesterbacka (NORCAS, 2015)

A NAND gate based standard cell VCO for use in synthesizable ADCs. - Vishnu Unnikrishnan 001; Mark Vesterbacka (NORCAS, 2015)

VCO-based ADCs for IoT applications. - Vishnu Unnikrishnan 001; Mark Vesterbacka; Atila Alvandpour (ISIC, 2016)

Mixed-Signal Design Using Digital CAD. - Vishnu Unnikrishnan 001; Mark Vesterbacka (ISVLSI, 2016)

Linearization of VCO-based ADCs using asynchronous sigma-delta modulation. - Vishnu Unnikrishnan 001; Mark Vesterbacka (MWSCAS, 2016)

Design of a VCO-based ADC in 28 nm CMOS. - Vishnu Unnikrishnan 001; Mark Vesterbacka (NORCAS, 2016)

An RNS based modular multiplier with reduced complexity. - Shahzad Asif; Mark Vesterbacka (NORCAS, 2017)

Mitigation of Sampling Errors in VCO-Based ADCs. - Vishnu Unnikrishnan 001; Mark Vesterbacka (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Ring Counters as Phase Accumulator in VCO-Based ADCs. - Mark Vesterbacka; Vishnu Unnikrishnan 001 (ICECS, 2018)