7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication. - Bodhisatwa Sadhu; Yahya M. Tousi; Joakim Hallin; Stefan Sahl; Scott K. Reynolds; Orjan Renstrom; Kristoffer Sjogren; Olov Haapalahti; Nadav Mazor; Bo Bokinge; Gustaf Weibull; Håkan Bengtsson; et al. (ISSCC, 2017)

A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications. - Bodhisatwa Sadhu; Yahya M. Tousi; Joakim Hallin; Stefan Sahl; Scott K. Reynolds; Orjan Renstrom; Kristoffer Sjogren; Olov Haapalahti; Nadav Mazor; Bo Bokinge; Gustaf Weibull; Håkan Bengtsson; et al. (IEEE J. Solid State Circuits, 2017)

Scaling Millimeter-Wave Phased Arrays: Challenges and Solutions. - Alberto Valdes-Garcia; Bodhisatwa Sadhu; Xiaoxiong Gu; Jean-Olivier Plouchart; Mark Yeck; Daniel J. Friedman (BCICTS, 2018)

A 128-element Dual-Polarized Software-Defined Phased Array Radio for mm-wave 5G Experimentation. - Bodhisatwa Sadhu; Arun Paidimarri; Mark A. Ferriss; Mark Yeck; Xiaoxiong Gu; Alberto Valdes-Garcia (mmNets, 2018)

Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C. - Wooram Lee; Jean-Olivier Plouchart; Caglar Ozdag; Yigit Aydogan; Mark Yeck; Alper Cabuk; Asim Kepkep; Scott K. Reynolds; Emre Apaydin; Alberto Valdes-Garcia (IEEE J. Solid State Circuits, 2018)

A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage. - Bodhisatwa Sadhu; Alberto Valdes-Garcia; Jean-Olivier Plouchart; Herschel A. Ainspan; Arpit K. Gupta; Mark A. Ferriss; Mark Yeck; Mihai Sanduleanu; Xiaoxiong Gu; Christian W. Baks; Duixian Liu; Daniel J. Friedman (IEEE J. Solid State Circuits, 2020)

A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation. - Kevin Tien; Ken Inoue; Scott Lekuch; David J. Frank; Sudipto Chakraborty; Pat Rosno; Thomas Fox; Mark Yeck; Joseph A. Glick; Raphael Robertazzi; Ray Richetta; John F. Bulzacchelli; et al. (DATE, 2022)

A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology. - David J. Frank; Sudipto Chakraborty; Kevin Tien; Pat Rosno; Thomas Fox; Mark Yeck; Joseph A. Glick; Raphael Robertazzi; Ray Richetta; John F. Bulzacchelli; Daniel Ramirez; Dereje Yilma; et al. (ISSCC, 2022)

A 24-to-30GHz 256-Element Dual-Polarized 5G Phased Array with Fast Beam-Switching Support for >30, 000 Beams. - Bodhisatwa Sadhu; Arun Paidimarri; Wooram Lee; Mark Yeck; Caglar Ozdag; Yujiro Tojo; Jean-Olivier Plouchart; Xiaoxiong Gu; Yusuke Uemichi; Sudipto Chakraborty; Yo Yamaguchi; Ning Guan; et al. (ISSCC, 2022)

A 0.31V Vmin Cryogenic SRAM in 14 nm FinFET for Quantum Computing. - Rajiv V. Joshi; John Timmerwilke; Kevin Tien; Mark Yeck; Sudipto Chakraborty (VLSI Technology and Circuits, 2022)

A Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET Technology. - Sudipto Chakraborty; David J. Frank; Kevin Tien; Pat Rosno; Mark Yeck; Joseph A. Glick; Raphael Robertazzi; Ray Richetta; John F. Bulzacchelli; Devin Underwood; Daniel Ramirez; Dereje Yilma; et al. (IEEE J. Solid State Circuits, 2022)

A 24-30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas. - Bodhisatwa Sadhu; Arun Paidimarri; Duixian Liu; Mark Yeck; Caglar Ozdag; Yujiro Tojo; Wooram Lee; Kevin Xiaoxiong Gu; Jean-Olivier Plouchart; Christian W. Baks; Yusuke Uemichi; Sudipto Chakraborty; et al. (IEEE J. Solid State Circuits, 2022)

Low power cryogenic RF ASICs for quantum computing. - David J. Frank; Sudipto Chakraborty; Kevin Tien; Pat Rosno; Mark Yeck; Joseph A. Glick; Raphael Robertazzi; Ray Richetta; John F. Bulzacchelli; Daniel Ramirez; Dereje Yilma; Andrew Davies; et al. (CICC, 2023)

Cryogenic CMOS: design considerations for future quantum computing systems. - Rajiv V. Joshi; Jean-Olivier Plouchart; George Zettles; Scott Willenborg; Sudipto Chakraborty; Blake R. Johnson; Andrew Wack; Brian Allison; John Timmerwilke; Kevin Tien; Mark Yeck; Dereje Yilma; et al. (CICC, 2023)

Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and Solutions. - Bodhisatwa Sadhu; Kevin Tien; Sudipto Chakraborty; David J. Frank; Pat Rosno; Daniel Moertl; Mark Yeck; John F. Bulzacchelli; Daniil Frolov; Devin Underwood; Ken Inoue; Christian W. Baks; et al. (CICC, 2025)