Lee router modified for global routing. - Andrew D. Brown; Mark Zwolinski (Comput. Aided Des., 1990)

A General Purpose Network Solving System. - Tom J. Kazmierski; Andrew D. Brown; Ken G. Nichols; Mark Zwolinski (VLSI, 1991)

Interleaving: an additional topological compaction technique for Weinberger array generation. - Keith Richard Baker; Mark Zwolinski (Comput. Aided Des., 1992)

Confidence in mixed-mode circuit simulation. - Andrew D. Brown; Mark Zwolinski; Ken G. Nichols; Tom J. Kazmierski (Comput. Aided Des., 1992)

Analogue Fault Modelling and Simulation for Supply Current Monitoring. - Mark Zwolinski; Chris D. Chalk; Brian R. Wilkins (ED&TC, 1996)

Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations. - Stephen J. Spinks; Chris D. Chalk; Ian M. Bell; Mark Zwolinski (DFT, 1997)

A design for test technique to increase the resolution of analogue supply current tests. - Chris D. Chalk; Mark Zwolinski (ICECS, 1998)

Testing analog circuits by supply voltage variation and supply current monitoring. - Yavuz Kiliç; Mark Zwolinski (CICC, 1999)

Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits. - Zheng Rong Yang; Mark Zwolinski (DATE, 1999)

Applying Mutual Information to Adaptive Mixture Models. - Zheng Rong Yang; Mark Zwolinski (IDEAL, 2000)

Applying a robust heteroscedastic probabilistic neural network toanalog fault detection and classification. - Zheng Rong Yang; Mark Zwolinski; Chris D. Chalk; Alan Christopher Williams (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Process variation independent built-in current sensor for analogue built-in self-test. - Yavuz Kiliç; Mark Zwolinski (ISCAS (4), 2001)

Practical algorithms for fully decoupled mixed-mode simulation of electronic circuits. - Mark Zwolinski; R. W. Allen (ISCAS (5), 2001)

A technique for transparent fault injection and simulation in VHDL. - Mark Zwolinski (Microelectron. Reliab., 2001)

Mutual Information Theory for Adaptive Mixture Models. - Zheng Rong Yang; Mark Zwolinski (IEEE Trans. Pattern Anal. Mach. Intell., 2001)

Using evolutionary and hybrid algorithms for DC operating point analysis of nonlinear circuits. - Duncan Crutchley; Mark Zwolinski (IEEE Congress on Evolutionary Computation, 2002)

Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. - Peter R. Wilson; J. Neil Ross; Mark Zwolinski; Andrew D. Brown; Yavuz Kiliç (DATE, 2002)

Transformation Based Insertion of On-Line Testing Resources in a High-Level Synthesis Environment. - Petros Oikonomakos; Mark Zwolinski (IOLTW, 2002)

Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric. - Petros Oikonomakos; Mark Zwolinski; Bashir M. Al-Hashimi (DATE, 2003)

Foundation of Combined Datapath and Controller Self-checking Design. - Petros Oikonomakos; Mark Zwolinski (IOLTS, 2003)

The continuous-discrete interface - What does this really mean? Modelling and simulation issues. - Andrew D. Brown; Mark Zwolinski (ISCAS (3), 2003)

Integrating testability with design space exploration. - Mark Zwolinski; Manoj Singh Gaur (Microelectron. Reliab., 2003)

Globally convergent algorithms for DC operating point analysis of nonlinear circuits. - Duncan Crutchley; Mark Zwolinski (IEEE Trans. Evol. Comput., 2003)

Behavioural modelling of analogue faults in VHDL-AMS - a case study. - Mark Zwolinski; Andrew D. Brown (ISCAS (5), 2004)

Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. - Manoj Singh Gaur; Mark Zwolinski (VLSI Design, 2004)

Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations. - Stephen J. Spinks; Chris D. Chalk; Ian M. Bell; Mark Zwolinski (J. Electron. Test., 2004)

Concurrent analogue fault simulation, the equation formulation aspect. - Vanco B. Litovski; Ivan Litovski; Mark Zwolinski (Int. J. Circuit Theory Appl., 2004)

Behavioural modelling, simulation, test and diagnosis of MEMS using ANNs. - Vanco B. Litovski; Mark Zwolinski; Miona Andrejevic (ISCAS (5), 2005)

Dynamic Voltage Scaling Aware Delay Fault Testing. - Noohul Basheer Zain Ali; Mark Zwolinski; Bashir M. Al-Hashimi; Peter Harrod (ETS, 2006)

Reversible Logic to Cryptographic Hardware: A New Paradigm - Himanshu Thapliyal; Mark Zwolinski (CoRR, 2006)

Analogue electronic circuit diagnosis based on ANNs. - Vanco B. Litovski; Miona Andrejevic; Mark Zwolinski (Microelectron. Reliab., 2006)

On the Design of Self-Checking Controllers with Datapath Interactions. - Petros Oikonomakos; Mark Zwolinski (IEEE Trans. Computers, 2006)

An Integrated High-Level On-Line Test Synthesis Tool. - Petros Oikonomakos; Mark Zwolinski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A novel self-routing reconfigurable fault-tolerant cell array. - Xiaoxuan She; Mark Zwolinski (AHS, 2007)

Testing of Level Shifters in Multiple Voltage Designs. - Noohul Basheer Zain Ali; Mark Zwolinski; Bashir M. Al-Hashimi (ICECS, 2007)

General and Technical Program Chairs' Message. - Driss Bouami; El Mostapha Aboulhamid; Mohsine Eleuldj; Mark Zwolinski (ICECS, 2007)

Multiple-Width Bus Partitioning Approach to Datapath Synthesis. - Arash Ahmadi; Mark Zwolinski (ISCAS, 2007)

Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure. - Karthik Baddam; Mark Zwolinski (VLSI Design, 2007)

Using neural networks as a fault detection mechanism in MEMS devices. - Reza Asgary; Karim Mohammadi; Mark Zwolinski (Microelectron. Reliab., 2007)

Behavioural Modelling for Stability of CMOS SRAM Cells Subject to Random Discrete Doping. - Yangang Wang; Mark Zwolinski; Michael Merrett (BMAS, 2008)

Divided Backend Duplication Methodology for Balanced Dual Rail Routing. - Karthik Baddam; Mark Zwolinski (CHES, 2008)

Symbolic noise analysis approach to computational hardware optimization. - Arash Ahmadi; Mark Zwolinski (DAC, 2008)

On the probability distribution of fixed-point multiplication. - Arash Ahmadi; Mark Zwolinski (ICECS, 2008)

Path switching: a technique to tolerate dual rail routing imbalances. - Karthik Baddam; Mark Zwolinski (Des. Autom. Embed. Syst., 2008)

Variation resilient adaptive controller for subthreshold circuits. - Biswajit Mishra; Bashir M. Al-Hashimi; Mark Zwolinski (DATE, 2009)

Analytical Transient Response and Propagation Delay Model for Nanoscale CMOS Inverter. - Yangang Wang; Mark Zwolinski (ISCAS, 2009)

New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits. - Miljana Sokolovic; Vanco B. Litovski; Mark Zwolinski (Microelectron. Reliab., 2009)

A communication infrastructure for a million processor machine. - Andrew D. Brown; Steve B. Furber; Jeff S. Reeve; Peter R. Wilson; Mark Zwolinski; John E. Chad; Luis A. Plana; David R. Lester (Conf. Computing Frontiers, 2010)

Modelling Smart Card Security Protocols in SystemC TLM. - Aisha Fouad Bushager; Mark Zwolinski (EUC, 2010)

Design metrics for RTL level estimation of delay variability due to intradie (random) variations. - Michael Merrett; Yangang Wang; Mark Zwolinski; Koushik Maharatna; Massimo Alioto (ISCAS, 2010)

Parallel sparse matrix solver for direct circuit simulations on FPGAs. - Tarek Nechma; Mark Zwolinski; Jeff S. Reeve (ISCAS, 2010)

Very large scale integration architecture for integer wavelet transform. - Ahmed K. Al-Sulaifanie; Arash Ahmadi; Mark Zwolinski (IET Comput. Digit. Tech., 2010)

Radiation hardening by design: A novel gate level approach. - Massoud Mokhtarpour Ghahroodi; Mark Zwolinski; Emre Özer 001 (AHS, 2011)

Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis. - Michael Merrett; Plamen Asenov; Yangang Wang; Mark Zwolinski; Dave Reid; Campbell Millar; Scott Roy; Zhenyu Liu; Stephen B. Furber; Asen Asenov (DATE, 2011)

Acceleration of Functional Validation Using GPGPU. - P. Lalith Suresh; Navaneeth Rameshan; Manoj Singh Gaur; Mark Zwolinski; Vijay Laxmi (DELTA, 2011)

Timing Vulnerability Factors of Ultra Deep-sub-micron CMOS. - Massoud Mokhtarpour Ghahroodi; Mark Zwolinski; Rick Wong; Shi-Jie Wen (ETS, 2011)

Parallelizing TUNAMI-N1 Using GPGPU. - Harsh Gidra; Israrul Haque; Nitin P. Kumar; M. Sargurunathan; Manoj Singh Gaur; Vijay Laxmi; Mark Zwolinski; Virendra Singh (HPCC, 2011)

Acceleration of packet filtering using gpgpu. - Manoj Singh Gaur; Vijay Laxmi; Lakshminarayanan V.; Kamal Cahndra; Mark Zwolinski (SIN, 2011)

Fixed-point multiplication: A probabilistic bit-pattern view. - Arash Ahmadi; Mark Zwolinski (Microelectron. Reliab., 2011)

On the VLSI Implementation of Adaptive-Frequency Hopf Oscillator. - Arash Ahmadi; Eduardo Mangieri; Koushik Maharatna; Srinandan Dasmahapatra; Mark Zwolinski (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

SETTOFF: A fault tolerant flip-flop for building Cost-efficient Reliable Systems. - Yang Lin; Mark Zwolinski (IOLTS, 2012)

A Large Scale Digital Simulation of Spiking Neural Networks (SNN) on Fast SystemC Simulator. - Hamid Soleimani; Arash Ahmadi; Mohammad Bavandpour; Amirali Amirsoleimani; Mark Zwolinski (UKSim, 2012)

ISPD 2013 expert designer/user session (eds). - Cliff C. N. Sze; Laleh Behjat; Nikhil Jayakumar; Atul Walimbe; Gregory Ford; Mark Zwolinski; Harish Dangat; Giriraj Kakol (ISPD, 2013)

Circuit Transient Analysis Using State Space Equations. - Kai Chi Alex Lam; Mark Zwolinski (VDAT, 2013)

Oscillation-based analog diagnosis using artificial neural networks based inference mechanism. - Miona Andrejevic Stosovic; Miljana Milic; Mark Zwolinski; Vanco B. Litovski (Comput. Electr. Eng., 2013)

Energy-Conscious Turbo Decoder Design: A Joint Signal Processing and Transmit Energy Reduction Approach. - Liang Li 013; Robert G. Maunder; Bashir M. Al-Hashimi; Mark Zwolinski; Lajos Hanzo (IEEE Trans. Veh. Technol., 2013)

A low-cost radiation hardened flip-flop. - Yang Lin; Mark Zwolinski; Basel Halak (DATE, 2014)

Efficient simulation and modelling of non-rectangular NoC topologies. - Ji Qi; Mark Zwolinski (DATE, 2014)

Fault tolerant and highly adaptive routing for 2D NoCs. - Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Masoud Daneshtalab; Masoumeh Ebrahimi; Mark Zwolinski (DFT, 2014)

Highly adaptive and congestion-aware routing for 3D NoCs. - Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Masoud Daneshtalab; Seok-Bum Ko; Mark Zwolinski (ACM Great Lakes Symposium on VLSI, 2014)

A cost-efficient self-checking register architecture for radiation hardened designs. - Yang Lin; Mark Zwolinski (ISCAS, 2014)

A novel non-minimal/minimal turn model for highly adaptive routing in 2D NoCs. - Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Masoud Daneshtalab; Pankaj Kumar Srivastava; Seok-Bum Ko; Mark Zwolinski (NOCS, 2014)

Fault tolerant routing implementation mechanism for irregular 2D mesh NoCs. - Rimpy Bishnoi; Vijay Laxmi; Manoj Singh Gaur; Radi Husin Bin Ramlee; Mark Zwolinski (NORCHIP, 2014)

A novel non-minimal turn model for highly adaptive routing in 2D NoCs. - Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Masoud Daneshtalab; Mark Zwolinski (VLSI-SoC, 2014)

CARM: Congestion Adaptive Routing Method for On Chip Networks. - Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Seok-Bum Ko; Mark Zwolinski (VLSID, 2014)

Monte Carlo Static Timing Analysis with statistical sampling. - Michael Merrett; Mark Zwolinski (Microelectron. Reliab., 2014)

Multivoltage Aware Resistive Open Fault Model. - Mohamed Tagelsir Mohammadat; Noohul Basheer Zain Ali; Fawnizu Azmadi Hussin; Mark Zwolinski (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Conservative behavioural modelling in systemc-AMS. - Sara Vinco; Michele Lora; Mark Zwolinski (FDL, 2015)

VLSI implementation of a scalable K-best MIMO detector. - Ibrahim A. Bello; Basel Halak; Mohammed El-Hajjar; Mark Zwolinski (ISCIT, 2015)

Network-on-chip: Current issues and challenges. - Manoj Singh Gaur; Vijay Laxmi; Mark Zwolinski; Manoj Kumar 001; Niyati Gupta; Ashish Sharma 005 (VDAT, 2015)

σLBDR: Congestion-aware logic based distributed routing for 2D NoC. - Niyati Gupta; Manoj Kumar 001; Vijay Laxmi; Manoj Singh Gaur; Mark Zwolinski (VDAT, 2015)

A framework for thermal aware reliability estimation in 2D NoC. - Ashish Sharma 005; Prachi Upadhyay; Ruby Ansar; Vijay Laxmi; Lava Bhargava; Manoj Singh Gaur; Mark Zwolinski (VDAT, 2015)

CERI: Cost-Effective Routing Implementation Technique for Network-on-Chip. - Rimpy Bishnoi; Vijay Laxmi; Manoj Singh Gaur; Radi Husin Bin Ramlee; Mark Zwolinski (VLSID, 2015)

In-Field Logic Repair of Deep Sub-Micron CMOS Processors. - Massoud Mokhtarpour Ghahroodi; Mark Zwolinski (CoRR, 2015)

Fault Tolerance in Distributed Neural Computing. - Anton Kulakov; Mark Zwolinski; Jeffrey S. Reeve (CoRR, 2015)

Implications of Burn-In Stress on NBTI Degradation. - Mohd Azman Abdul Latif; Noohul Basheer Zain Ali; Fawnizu Azmadi Hussin; Mark Zwolinski (CoRR, 2015)

Parallel Sparse Matrix Solution for Circuit Simulation on FPGAs. - Tarek Nechma; Mark Zwolinski (IEEE Trans. Computers, 2015)

Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs. - Mohamed Tagelsir Mohammadat; Noohul Basheer Zain Ali; Fawnizu Azmadi Hussin; Mark Zwolinski (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Static Aging Analysis Using 3-Dimensional Delay Library. - Haider Abbas; Mark Zwolinski; Basel Halak (ERMAVSS@DATE, 2016)

NBTI Lifetime Evaluation and Extension in Instruction Caches. - Shengyu Duan; Basel Halak; Rick Wong; Mark Zwolinski (ERMAVSS@DATE, 2016)

Ageing Impact on a High Speed Voltage Comparator with Hysteresis. - Illani Mohd Nawi; Basel Halak; Mark Zwolinski (ERMAVSS@DATE, 2016)

The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. - Illani Mohd Nawi; Basel Halak; Mark Zwolinski (ETS, 2016)

The European Masters in Embedded Computing Systems (EMECS). - Mark Zwolinski; Wolfgang Kunz; Kjetil Svarstad; Andrew D. Brown (EWME, 2016)

High accuracy implementation of Adaptive Exponential integrated and fire neuron model. - Aliasghar Makhlooghpour; Hamid Soleimani; Arash Ahmadi; Mark Zwolinski; Mehrdad Saif (IJCNN, 2016)

NBTI aging evaluation of PUF-based differential architectures. - Mohd Syafiq Mispan; Basel Halak; Mark Zwolinski (IOLTS, 2016)

Overview of PUF-based hardware security solutions for the internet of things. - Basel Halak; Mark Zwolinski; Mohd Syafiq Mispan (MWSCAS, 2016)

Using Iddt current degradation to monitor ageing in CMOS circuits. - Radi Husin Bin Ramlee; Mark Zwolinski (PATMOS, 2016)

IEEE Access Special Section Editorial: Security and Reliability Aware System Design for Mobile Computing Devices. - Anirban Sengupta; Saraju P. Mohanty; Fabrizio Lombardi; Mark Zwolinski (IEEE Access, 2016)

A Survey of VLSI Implementations of Tree Search Algorithms for MIMO Detection. - Ibrahim A. Bello; Basel Halak; Mohammed El-Hajjar; Mark Zwolinski (Circuits Syst. Signal Process., 2016)

σ n LBDR: generic congestion handling routing implementation for two-dimensional mesh network-on-chip. - Niyati Gupta; Ashish Sharma 005; Vijay Laxmi; Manoj Singh Gaur; Mark Zwolinski; Rimpy Bishnoi (IET Comput. Digit. Tech., 2016)

Guest Editorial. - Mark Zwolinski; Manoj Singh Gaur; Vijay Laxmi; Usha Sandeep Mehta (IET Comput. Digit. Tech., 2016)

Resilient routing implementation in 2D mesh NoC. - Rimpy Bishnoi; Vijay Laxmi; Manoj Singh Gaur; Mark Zwolinski (Microelectron. Reliab., 2016)

A Low-Cost, Radiation-Hardened Method for Pipeline Protection in Microprocessors. - Yang Lin; Mark Zwolinski; Basel Halak (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction. - Enrico Fraccaroli; Francesco Stefanni; Franco Fummi; Mark Zwolinski (FDL (Selected Papers), 2017)

A cost-efficient delay-fault monitor. - Gaole Sai; Basel Halak; Mark Zwolinski (ISCAS, 2017)

Hardware performance counters for system reliability monitoring. - Elena Lai Leng Woo; Mark Zwolinski; Basel Halak (IVSW, 2017)

Lightweight obfuscation techniques for modeling attacks resistant PUFs. - Mohd Syafiq Mispan; Basel Halak; Mark Zwolinski (IVSW, 2017)

An ageing-aware digital synthesis approach. - Shengyu Duan; Basel Halak; Mark Zwolinski (SMACD, 2017)

BTI mitigation by anti-ageing software patterns. - Haider Muhi Abbas; Basel Halak; Mark Zwolinski (Microelectron. Reliab., 2017)

Cell Flipping with Distributed Refresh for Cache Ageing Minimization. - Shengyu Duan; Basel Halak; Mark Zwolinski (ATS, 2018)

Cost-efficient design for modeling attacks resistant PUFs. - Mohd Syafiq Mispan; Haibo Su; Mark Zwolinski; Basel Halak (DATE, 2018)

Early detection of system-level anomalous behaviour using hardware performance counters. - Lai Leng Woo; Mark Zwolinski; Basel Halak (DATE, 2018)

A Power Efficient Crossbar Arbitration in Multi-NoC for Multicast and Broadcast Traffic. - Sonal Yadav; Vijay Laxmi; Hemangee K. Kapoor; Manoj Singh Gaur; Mark Zwolinski (iSES, 2018)

A Machine Learning Attacks Resistant Two Stage Physical Unclonable Functions Design. - Haibo Su; Mark Zwolinski; Basel Halak (IVSW, 2018)

Hardware Implementation of a Low-Power K-Best MIMO Detector Based on a Hybrid Merge Network. - Ibrahim A. Bello; Basel Halak; Mohammed El-Hajjar; Mark Zwolinski (PATMOS, 2018)

Multi-Path Aging Sensor for Cost-Efficient Delay Fault Prediction. - Gaole Sai; Basel Halak; Mark Zwolinski (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Lifetime Reliability-Aware Digital Synthesis. - Shengyu Duan; Mark Zwolinski; Basel Halak (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Two-Stage Architectures for Resilient Lightweight PUFs. - Haibo Su; Basel Halak; Mark Zwolinski (IVSW, 2019)

Using Hardware Performance Counters to Detect Control Hijacking Attacks. - Miao Yu; Basel Halak; Mark Zwolinski (IVSW, 2019)

VLSI Implementation of a Fully-Pipelined K-Best MIMO Detector with Successive Interference Cancellation. - Ibrahim A. Bello; Basel Halak; Mohammed El-Hajjar; Mark Zwolinski (Circuits Syst. Signal Process., 2019)

A reliable PUF in a dual function SRAM. - Mohd Syafiq Mispan; Shengyu Duan; Basel Halak; Mark Zwolinski (Integr., 2019)

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. - Massimo Alioto; Magdy S. Abadir; Tughrul Arslan; Chirn Chye Boon; Andreas Burg 001; Chip-Hong Chang; Meng-Fan Chang; Yao-Wen Chang; Poki Chen; Pasquale Corsonello; Paolo Crovetti; Shiro Dosho; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A Survey on the Susceptibility of PUFs to Invasive, Semi-Invasive and Noninvasive Attacks: Challenges and Opportunities for Future Directions. - Mohd Syafiq Mispan; Basel Halak; Mark Zwolinski (J. Circuits Syst. Comput., 2021)

Learning-based BTI stress estimation and mitigation in multi-core processor systems. - Haider Muhi Abbas; Basel Halak; Mark Zwolinski (Microprocess. Microsystems, 2021)

Session details: Session 4A: Testing, Reliability and Fault Tolerance. - Mark Zwolinski (ACM Great Lakes Symposium on VLSI, 2022)

Mitigating Cache Contention-Based Attacks by Logical Associativity. - Xiao Liu; Mark Zwolinski (PRIME, 2022)

Using Formal Methods to Evaluate Hardware Reliability in the Presence of Soft Errors. - Bing Xue; Mark Zwolinski (PRIME, 2022)

Investigation of Single-Event Upsets in Radiation Hardened RRAM Memory Cells. - Ahmet Cirakoglu; Alexander Serb; Mark Zwolinski; Themis Prodromakis (NewCAS, 2024)

Using Formal Verification to Evaluate Single Event Upsets in a RISC-V Core. - Bing Xue; Mark Zwolinski (CoRR, 2024)

SEA Cache: A Performance-Efficient Countermeasure for Contention-based Attacks. - Xiao Liu; Mark Zwolinski; Basel Halak (CoRR, 2024)

Miti-CAT: Mitigating Power Side-Channel Vulnerabilities in FPGA-Based CNN Accelerators Through Distributed Convolution Computation. - Jing He; Mark Zwolinski (CSR, 2025)

Design of a Single-Event Upset Tolerant Low-Power Double-Tail Comparator. - Ahmet Cirakoglu; Alexander Serb; Khaled Humood; Mark Zwolinski; Themis Prodromakis (ISCAS, 2025)

Enabling Efficient Pure-NMOS Circuits Through Adiabatic Complementary Pass-Transistor Logic. - Keyu Chen; Geoff V. Merrett; Mark Zwolinski (NewCAS, 2025)