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Markus Pister

Affiliations:
  • Saarland University, Germany
  • AbsInt GmbH, Saarbrücken, Germany


According to our database1, Markus Pister authored at least 10 papers between 2005 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Testing Implementation Soundness of a WCET Analysis Tool.
[BibTeX]
[DOI]
Reinhard Wilhelm
,
Markus Pister
,
Gernot Gebhard
,
Daniel Kästner
Proceedings of the A Journey of Embedded and Cyber-Physical Systems, 2021

2019
TimeWeaver: A Tool for Hybrid Worst-Case Execution Time Analysis.
[BibTeX]
[DOI]
Daniel Kästner
,
Markus Pister
,
Simon Wegener
,
Christian Ferdinand
Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis, 2019

2013
Confidence in Timing.
[BibTeX]
[DOI]
Daniel Kästner
,
Markus Pister
,
Gernot Gebhard
,
Marc Schlickling
,
Christian Ferdinand
Proceedings of the SAFECOMP 2013, 2013

2012
Timing model derivation: pipeline analyzer generation from hardware description languages.
[BibTeX]
[DOI]
Markus Pister
PhD thesis, 2012

Meeting Real-Time Requirements with Multi-core Processors.
[BibTeX]
[DOI]
Daniel Kästner
,
Marc Schlickling
,
Markus Pister
,
Christoph Cullmann
,
Gernot Gebhard
,
Reinhold Heckmann
,
Christian Ferdinand
Proceedings of the Computer Safety, Reliability, and Security, 2012

2010
Semi-automatic derivation of timing models for WCET analysis.
[BibTeX]
[DOI]
Marc Schlickling
,
Markus Pister
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

2009
Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems.
[BibTeX]
[DOI]
Reinhard Wilhelm
,
Daniel Grund
,
Jan Reineke
,
Marc Schlickling
,
Markus Pister
,
Christian Ferdinand
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008
Timing Validation of Automotive Software.
[BibTeX]
[DOI]
Daniel Kästner
,
Reinhard Wilhelm
,
Reinhold Heckmann
,
Marc Schlickling
,
Markus Pister
,
Marek Jersak
,
Kai Richter
,
Christian Ferdinand
Proceedings of the Leveraging Applications of Formal Methods, 2008

2007
A Framework for Static Analysis of VHDL Code.
[BibTeX]
[DOI]
Marc Schlickling
,
Markus Pister
Proceedings of the 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2007

2005
Generic Software Pipelining at the Assembly Level.
[BibTeX]
[DOI]
Daniel Kästner
,
Markus Pister
Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, USA, September 29, 2005


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