A new hierarchical built-in self-test with on-chip diagnosis for VLIW processors. - Markus Ulbricht 002; Mario Schölzel; Tobias Koal; Heinrich Theodor Vierhaus (DDECS, 2011)

Combining on-line fault detection and logic self repair. - Tobias Koal; Markus Ulbricht 002; Heinrich Theodor Vierhaus (DDECS, 2012)

Activity Migration in M-of-N-Systems by Means of Load-Balancing. - Markus Ulbricht 002; Heinrich Theodor Vierhaus; Tobias Koal (DSD, 2012)

On the feasibility of combining on-line-test and self repair for logic circuits. - Tobias Koal; Markus Ulbricht 002; Piet Engelke; Heinrich Theodor Vierhaus (DDECS, 2013)

Virtual TMR Schemes Combining Fault Tolerance and Self Repair. - Tobias Koal; Markus Ulbricht 002; Heinrich Theodor Vierhaus (DSD, 2013)

A Methodology to Verify Digital IP's within Mixed-Signal Systems. - Navaneetha Channiganathota Manjappa; Anselm Breitenreiter; Markus Ulbricht 002; Milos Krstic (DDECS, 2018)

Power/Area-Optimized Fault Tolerance for Safety Critical Applications. - Milos Krstic; Aleksandar Simevski; Markus Ulbricht 002; Stefan Weidling (IOLTS, 2018)

Developing a Configurable Fault Tolerant Multicore System for Optimized Sensor Processing. - Markus Ulbricht 002; Rizwan Tariq Syed; Milos Krstic (DFT, 2019)

Recognition of Objects in the Urban Environment using R-CNN and YOLO Deep Learning Algorithms. - Rijad Saric; Markus Ulbricht 002; Milos Krstic; Jasmin Kevric; Dejan Jokic (MECO, 2020)

Fault Tolerant Platform for Communication and Distance Measurement in Highly Automated Driving. - Rizwan Tariq Syed; Markus Ulbricht 002; Wael A. Ahmad; Herman Jalli Ng; Vladica Sark; Raqibul Hasan; Milos Krstic (MECO, 2020)

Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment. - Jianan Wen; Markus Ulbricht 002; Eduardo Pérez; Xin Fan 003; Milos Krstic (DDECS, 2021)

Machine Learning Approach for Accelerating Simulation-based Fault Injection. - Li Lu; Junchao Chen 001; Anselm Breitenreiter; Oliver Schrape; Markus Ulbricht 002; Milos Krstic (NorCAS, 2021)

Evaluating Read Disturb Effect on RRAM based AI Accelerator with Multilevel States and Input Voltages. - Jianan Wen; Andrea Baroni; Eduardo Pérez; Markus Ulbricht 002; Christian Wenger; Milos Krstic (DFT, 2022)

A Methodology for Identifying Critical Sequential Circuits with Graph Convolutional Networks. - Li Lu; Junchao Chen 001; Markus Ulbricht 002; Milos Krstic (ISVLSI, 2022)

FPGA-Based Acceleration of Convolutional Neural Network for Gesture Recognition Using mm-Wave FMCW Radar. - Rizwan Tariq Syed; Yanhua Zhao; Markus Ulbricht 002; Vladica Sark; Milos Krstic (NorCAS, 2022)

Bits, Flips and RISCs. - Nicolas Gerlin; Endri Kaja; Fabian Vargas 001; Li Lu; Anselm Breitenreiter; Junchao Chen 001; Markus Ulbricht 002; Maribel Gomez; Ares Tahiraga; Sebastian Prebeck; Eyck Jentzsch; Milos Krstic; et al. (DDECS, 2023)

Towards a Smart Multi-Sensor Ionizing Radiation Monitoring System. - Marko S. Andjelkovic; Junchao Chen 001; Rizwan Tariq Syed; Fabian Vargas 001; Markus Ulbricht 002; Milos Krstic; Stefan D. Ilic; Milos Marjanovic; Sandra Veljkovic; Nikola Mitrovic; Danijel Dankovic; Goran S. Ristic; et al. (DSD, 2023)

PULP Fiction No More - Dependable PULP Systems for Space. - Markus Ulbricht 002; Yvan Tortorella; Michael Rogenmoser; Li Lu; Junchao Chen 001; Francesco Conti 001; Milos Krstic; Luca Benini (ETS, 2023)

Adaptive Lock-Step System for Resilient Multiprocessing Architectures. - Junchao Chen 001; Li Lu; Marko S. Andjelkovic; Markus Ulbricht 002; Milos Krstic (NorCAS, 2023)

Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins. - Markus Fritscher; Alessandro Veronesi; Andrea Baroni; Jianan Wen; Thorsten Spätling; Mamathamba Kalishettyhalli Mahadevaiah; Norbert Herfurth; Eduardo Pérez; Markus Ulbricht 002; Marc Reichenbach; Amelie Hagelauer; Milos Krstic (ISC Workshops, 2023)

Towards Reconfigurable CNN Accelerator for FPGA Implementation. - Rizwan Tariq Syed; Marko S. Andjelkovic; Markus Ulbricht 002; Milos Krstic (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Towards SEU Fault Propagation Prediction with Spatio-Temporal Graph Convolutional Networks. - Li Lu; Junchao Chen 001; Markus Ulbricht 002; Milos Krstic (DATE, 2024)

Towards Reliable and Energy-Efficient RRAM Based Discrete Fourier Transform Accelerator. - Jianan Wen; Andrea Baroni; Eduardo Pérez; Max Uhlmann; Markus Fritscher; Karthik KrishneGowda; Markus Ulbricht 002; Christian Wenger; Milos Krstic (DATE, 2024)

Aging and Soft Error Resilience in Reconfigurable CNN Accelerators Employing a Multi-Purpose On-Chip Sensor. - Rizwan Tariq Syed; Fabian Vargas 001; Marko S. Andjelkovic; Markus Ulbricht 002; Milos Krstic (LATS, 2024)

Silicon Lifecycle Management Based on On-Chip Cross-Layer Sensing and Analytics for Space Applications. - Fabian Vargas 001; Milos Krstic; Marko S. Andjelkovic; Markus Ulbricht 002; Junchao Chen 001 (LATS, 2024)

FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities. - Rizwan Tariq Syed; Yanhua Zhao; Junchao Chen 001; Marko S. Andjelkovic; Markus Ulbricht 002; Milos Krstic (IEEE Access, 2024)

Toward Critical Flip-Flop Identification for Soft-Error Tolerance With Graph Neural Networks. - Li Lu; Junchao Chen 001; Markus Ulbricht 002; Milos Krstic (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Machine Learning Methodologies to Predict the Results of Simulation-Based Fault Injection. - Li Lu; Junchao Chen 001; Markus Ulbricht 002; Milos Krstic (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Accelerate SEU Simulation-Based Fault Injection With Spatio-Temporal Graph Convolutional Networks. - Li Lu; Junchao Chen 001; Aneesh Balakrishnan; Markus Ulbricht 002; Milos Krstic (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)