Interconnection Generation for System-on-Chip Design. - Markus Winter 002; Gerhard P. Fettweis (SoC, 2006)

A Network-on-Chip Channel Allocator for Run-Time Task Scheduling in Multi-Processor System-on-Chips. - Markus Winter 002; Gerhard P. Fettweis (DSD, 2008)

A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. - Torsten Limberg; Markus Winter 002; Marcel Bimberg; Reimund Klemm; Emil Matús; Marcos B. S. Tavares; Gerhard P. Fettweis; Hendrik Ahlendorf; Pablo Robelly (ESSCIRC, 2008)

Guaranteed service virtual channel allocation in NoCs for run-time task scheduling. - Markus Winter 002; Gerhard P. Fettweis (DATE, 2011)

Fair rate packet arbitration in Network-on-Chip. - Falko Guderian; Erik Fischer; Markus Winter 002; Gerhard P. Fettweis (SoCC, 2011)

A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS. - Dennis Walter; Sebastian Höppner; Holger Eisenreich; Georg Ellguth; Stephan Henker; Stefan Hänzsche; René Schüffny; Markus Winter 002; Gerhard P. Fettweis (ISSCC, 2012)

A 335Mb/s 3.9mm2 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. - Markus Winter 002; Steffen Kunze; Esther P. Adeva; Björn Mennenga; Emil Matús; Gerhard P. Fettweis; Holger Eisenreich; Georg Ellguth; Sebastian Höppner; Stefan Scholze; René Schüffny; Tomoyoshi Kobori (ISSCC, 2012)

Unterstützung und Organisation von Quality-of-Service-Techniken in Kommunikationsnetzwerken auf einem Chip (Network-on-Chip). - Markus Winter 002 (Vogt, 2012)

Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs. - Oliver Arnold; Emil Matús; Benedikt Noethen; Markus Winter 002; Torsten Limberg; Gerhard P. Fettweis (ACM Trans. Embed. Comput. Syst., 2014)