Design of Majority Logic Based Comparator. - Kartikeya Dubey; Marshal Raj; G. Lakshminarayanan (ICCCNT, 2018)

High Speed Controllable Inverter for Adder-Subtractor in QCA. - Marshal Raj; Raja Sekar Kumaresan; Gopalakrishnan Lakshminarayanan (ICCCNT, 2019)

Optimized Multiplexer and Exor gate in 4-dot 2-electron QCA using Novel Input Technique. - Marshal Raj; Raja Sekar Kumaresan; Gopalakrishnan Lakshminarayanan (ICCCNT, 2019)

Area-Efficient D-Flip Flop and XOR in QCA. - Raja Sekar Kumaresan; Marshal Raj; Gopalakrishnan Lakshminarayanan (ICCCNT, 2020)

Configurable Logic Blocks and Memory Blocks for Beyond-CMOS FPGA-Based Embedded Systems. - Marshal Raj; Gopalakrishnan Lakshminarayanan; Seok-Bum Ko; Nagi Naganathan; N. Ramasubramanian 001 (IEEE Embed. Syst. Lett., 2020)

Reliable SRAM using NAND-NOR Gate in beyond-CMOS QCA technology. - Marshal Raj; Gopalakrishnan Lakshminarayanan; Seok-Bum Ko (IET Comput. Digit. Tech., 2021)

A novel boundary elemental analysis based frequency domain adaptive sampling technique for aerospace application. - R. Umamaheswaran; Parameshwaran Ramalingam; Marshal Raj; Gopalakrishnan Lakshminarayanan; S. Thiruppathirajan (Microprocess. Microsystems, 2021)

Optimal Test Sequences for Logic Verification closure in State Dependent RTL Digital designs. - Anantharaj Thalaimalai Vanaraj; Raja Sekar Kumaresan; Marshal Raj; G. Lakshminarayanan (ICCCNT, 2022)

Reliable Quantum-dot Cellular Automata Coplanar Adder and Subtractor for Multi-bit Designs. - Anantharaj Thalaimalai Vanaraj; Raja Sekar Kumaresan; Marshal Raj; Anand Venkitachalam; G. Lakshminarayanan (ICCCNT, 2022)

Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata. - Marshal Raj; Raja Sekar Kumaresan; G. Lakshminarayanan (IEEE Des. Test, 2022)

High-Speed Serial-Parallel Multiplier in Quantum-Dot Cellular Automata. - Raja Sekar Kumaresan; Marshal Raj; G. Lakshminarayanan (IEEE Embed. Syst. Lett., 2022)

Framework for QCA Layout Generation and Rules for Rotated Cell Design. - Raja Sekar Kumaresan; Marshal Raj; Gopalakrishnan Lakshminarayanan (J. Circuits Syst. Comput., 2023)

Investigation on cost effective smart construction techniques for quality monitoring and risk management in small scale construction sites in India. - Marshal Raj; Deepa Sree Pandiaraj; Brintha Sahadevan; Ganeshprabhu Parvathikumar (Int. J. Crit. Infrastructures, 2025)

Reliable Synchronous and Asynchronous Counter Design in QCA. - Y. S. S. Gowri Sai Saketha; Aravindhan Alagarsamy; Marshal Raj; Gian Carlo Cardarilli; Seok-Bum Ko (J. Circuits Syst. Comput., 2025)