A High-Speed Asynchronous Decompression Circuit for Embedded Processors. - Martin Benes 002; Andrew Wolfe; Steven M. Nowick (ARVLSI, 1997)

A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors. - Martin Benes 002; Steven M. Nowick; Andrew Wolfe (ASYNC, 1998)

A 1-V heterogeneous reconfigurable DSP IC for wireless baseband digital signal processing. - Hui Zhang 008; Vandana Prabhu; George Varghese; Marlene Wan; Martin Benes 002; Arthur Abnous; Jan M. Rabaey (IEEE J. Solid State Circuits, 2000)

Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System. - Marlene Wan; Hui Zhang 008; George Varghese; Martin Benes 002; Arthur Abnous; Vandana Prabhu; Jan M. Rabaey (J. VLSI Signal Process., 2001)