A Random-Walk Model of a Queue Storage Problem. - Edward G. Coffman Jr.; Martin S. Schmookler (IEEE Trans. Computers, 1968)

High-Speed Binary-to-Decimal Conversion. - Martin S. Schmookler (IEEE Trans. Computers, 1968)

On Mod-2 Sums of Products. - Martin S. Schmookler (IEEE Trans. Computers, 1969)

Minimum test patterns for residue networks. - Douglas C. Bossen; Daniel L. Ostapko; Arvind M. Patel; Martin S. Schmookler (DAC, 1971)

High Speed Decimal Addition. - Martin S. Schmookler; Arnold Weinberger (IEEE Trans. Computers, 1971)

Avoiding Unknown States When Scanning Mutually Exclusive Latches. - Stephen Pateras; Martin S. Schmookler (ITC, 1995)

Series Approximation Methods for Divide and Square Root in the Power3(TM) Processor. - Martin S. Schmookler; Ramesh C. Agarwal; Fred G. Gustavson (IEEE Symposium on Computer Arithmetic, 1999)

A Low-Power, High-Speed Implementation of a PowerPC(tm) Microprocessor Vector Extension. - Martin S. Schmookler; Michael Putrino; Anh Mather; Jon Tyler; Huy Van Nguyen; Charles Roth; Mukesh Sharma; Mydung N. Pham; Jeff Lent (IEEE Symposium on Computer Arithmetic, 1999)

Leading Zero Anticipation and Detection-A Comparison of Methods. - Martin S. Schmookler; Kevin J. Nowka (IEEE Symposium on Computer Arithmetic, 2001)

Hardware Implementations of Denormalized Numbers. - Eric M. Schwarz; Martin S. Schmookler; Son Dao Trong (IEEE Symposium on Computer Arithmetic, 2003)

Pain versus Gain in the Hardware Design of FPUs and Supercomputers. - Roger A. Golliver; Silvia M. Müller; Stuart F. Oberman; Martin S. Schmookler; Debjit Das Sarma; Andrew Beaumont-Smith (IEEE Symposium on Computer Arithmetic, 2005)

FPU Implementations with Denormalized Numbers. - Eric M. Schwarz; Martin S. Schmookler; Son Dao Trong (IEEE Trans. Computers, 2005)

P6 Binary Floating-Point Unit. - Son Dao Trong; Martin S. Schmookler; Eric M. Schwarz; Michael Kroener (IEEE Symposium on Computer Arithmetic, 2007)