A 1.7mW quadrature bandpass ΔΣ ADC with 1MHz BW and 60dB DR at 1MHz IF. - Aytac Atac; Lei Liao; Yifan Wang 001; Martin Schleyer; Ye Zhang 003; Ralf Wunderlich; Stefan Heinen (ISCAS, 2013)

An HDL-Based System Design Methodology for Multistandard RF SoC's. - Aytac Atac; Zhimiao Chen; Lei Liao; Yifan Wang 001; Martin Schleyer; Ye Zhang 003; Ralf Wunderlich; Stefan Heinen (DAC, 2014)

A 1.2V, 2.7mA receiver front-end for bluetooth low energy applications. - Lei Liao; Aytac Atac; Ye Zhang 003; Yifan Wang 001; Zhimiao Chen; Martin Schleyer; Ralf Wunderlich; Stefan Heinen (RWS, 2014)