JOP: A Java Optimized Processor. - Martin Schoeberl (OTM Workshops, 2003)

Using a Java Optimized Processor in a Real World Application. - Martin Schoeberl (WISES, 2003)

Java Technology in an FPGA. - Martin Schoeberl (FPL, 2004)

Restrictions of Java for Embedded Real-Time Systems. - Martin Schoeberl (ISORC, 2004)

A Time Predictable Instruction Cache for a Java Processor. - Martin Schoeberl (OTM Workshops, 2004)

Design and Implementation of an Efficient Stack Machine. - Martin Schoeberl (IPDPS, 2005)

Automatic generation of application-specific systems based on a micro-programmed Java core. - Flavius Gruian; Per Andersson; Krzysztof Kuchcinski; Martin Schoeberl (SAC, 2005)

A time predictable Java processor. - Martin Schoeberl (DATE, 2006)

Real-Time Garbage Collection for Java. - Martin Schoeberl (ISORC, 2006)

Exact roots for a real-time garbage collector. - Rasmus Ulslev Pedersen; Martin Schoeberl (JTRES, 2006)

WCET analysis for a Java processor. - Martin Schoeberl; Rasmus Ulslev Pedersen (JTRES, 2006)

An Embedded Support Vector Machine. - Rasmus Ulslev Pedersen; Martin Schoeberl (WISES, 2006)

Modeling the Function Cache for Worst-Case Execution Time Analysis. - Raimund Kirner; Martin Schoeberl (DAC, 2007)

Time Predictable CPU and DMA Shared Memory Access. - Christof Pitter; Martin Schoeberl (FPL, 2007)

A Time-Triggered Network-on-Chip. - Martin Schoeberl (FPL, 2007)

A Profile for Safety Critical Java. - Martin Schoeberl; Hans Søndergaard; Bent Thomsen; Anders P. Ravn (ISORC, 2007)

Towards a Java multiprocessor. - Christof Pitter; Martin Schoeberl (JTRES, 2007)

picoJava-II in an FPGA. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2007)

Architecture for object-oriented programming languages. - Martin Schoeberl (JTRES, 2007)

Garbage collection for safety critical Java. - Martin Schoeberl; Jan Vitek (JTRES, 2007)

Mission Modes for Safety Critical Java. - Martin Schoeberl (SEUS, 2007)

Cache-aware cross-profiling for java processors. - Walter Binder; Alex Villazón; Martin Schoeberl; Philippe Moret (CASES, 2008)

Toward Libraries for Real-Time Java. - Trevor Harmon; Martin Schoeberl; Raimund Kirner; Raymond Klefstad (ISORC, 2008)

Interrupt Handlers in Java. - Stephan Korsholm; Martin Schoeberl; Anders P. Ravn (ISORC, 2008)

Hardware Objects for Java. - Martin Schoeberl; Christian Thalinger; Stephan Korsholm; Anders P. Ravn (ISORC, 2008)

Non-blocking root scanning for real-time garbage collection. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2008)

Non-blocking object copy for real-time garbage collection. - Martin Schoeberl; Wolfgang Puffitsch (JTRES, 2008)

Cross-Profiling for Embedded Java Processors. - Walter Binder; Martin Schoeberl; Philippe Moret; Alex Villazón (QEST, 2008)

A Modular Worst-case Execution Time Analysis Tool for Java Processors. - Trevor Harmon; Martin Schoeberl; Raimund Kirner; Raymond Klefstad (IEEE Real-Time and Embedded Technology and Applications Symposium, 2008)

Performance evaluation of a java chip-multiprocessor. - Christof Pitter; Martin Schoeberl (SIES, 2008)

On Composable System Timing, Task Timing, and WCET Analysis. - Peter P. Puschner; Martin Schoeberl (WCET, 2008)

A Java processor architecture for embedded real-time systems. - Martin Schoeberl (J. Syst. Archit., 2008)

Educational case studies with an open source embedded real-time Java processor. - Rasmus Ulslev Pedersen; Martin Schoeberl (WESE@ESWEEK, 2009)

A disruptive computer design idea: Architectures with repeatable timing. - Stephen A. Edwards; Sungjun Kim; Edward A. Lee; Isaac Liu; Hiren D. Patel; Martin Schoeberl (ICCD, 2009)

Embedded JIT Compilation with CACAO on YARI. - Florian Brandner; Tommy Thorn; Martin Schoeberl (ISORC, 2009)

Thread-Local Scope Caching for Real-time Java. - Andy J. Wellings; Martin Schoeberl (ISORC, 2009)

Using hardware methods to improve time-predictable performance in real-time Java systems. - Jack Whitham; Neil C. Audsley; Martin Schoeberl (JTRES, 2009)

Analyzing performance and dynamic behavior of embedded Java software with calling-context cross-profiling. - Philippe Moret; Walter Binder; Martin Schoeberl; Alex Villazón; Danilo Ansaloni (PPPJ, 2009)

Locating Performance Bottlenecks in Embedded Java Software with Calling-Context Cross-Profiling. - Philippe Moret; Walter Binder; Alex Villazón; Danilo Ansaloni; Martin Schoeberl (QEST, 2009)

Design Space Exploration for Java Processors with Cross-Profiling. - Martin Schoeberl; Walter Binder; Philippe Moret; Alex Villazón (QEST, 2009)

Towards Time-Predictable Data Caches for Chip-Multiprocessors. - Martin Schoeberl; Wolfgang Puffitsch; Benedikt Huber (SEUS, 2009)

A Single-Path Chip-Multiprocessor System. - Martin Schoeberl; Peter P. Puschner; Raimund Kirner (SEUS, 2009)

Comparison of Implicit Path Enumeration and Model Checking Based WCET Analysis. - Benedikt Huber; Martin Schoeberl (WCET, 2009)

Is Chip-Multiprocessing the End of Real-Time Scheduling?. - Martin Schoeberl; Peter P. Puschner (WCET, 2009)

Time-Predictable Computer Architecture. - Martin Schoeberl (EURASIP J. Embed. Syst., 2009)

Cross-profiling for Java processors. - Walter Binder; Martin Schoeberl; Philippe Moret; Alex Villazón (Softw. Pract. Exp., 2009)

Design and Implementation of Real-Time Transactional Memory. - Martin Schoeberl; Peter Hilber (FPL, 2010)

Worst-Case Analysis of Heap Allocations. - Wolfgang Puffitsch; Benedikt Huber; Martin Schoeberl (ISoLA (2), 2010)

WCET driven design space exploration of an object cache. - Benedikt Huber; Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2010)

Exhaustive testing of safety critical Java. - Tomas Kalibera; Pavel Parízek; Michal Malohlava; Martin Schoeberl (JTRES, 2010)

Object oriented machine learning with a multicore real-time Java processor: short paper. - Rasmus Ulslev Pedersen; Martin Schoeberl (JTRES, 2010)

Cyclic executive for safety-critical Java on chip-multiprocessors. - Anders P. Ravn; Martin Schoeberl (JTRES, 2010)

The embedded Java benchmark suite JemBench. - Martin Schoeberl; Thomas B. Preußer; Sascha Uhrig (JTRES, 2010)

RTTM: real-time transactional memory. - Martin Schoeberl; Florian Brandner; Jan Vitek (SAC, 2010)

Code Generation for Embedded Java with Ptolemy. - Martin Schoeberl; Christopher X. Brooks; Edward A. Lee (SEUS, 2010)

Scheduling of hard real-time garbage collection. - Martin Schoeberl (Real Time Syst., 2010)

Worst-case execution time analysis for a Java processor. - Martin Schoeberl; Wolfgang Puffitsch; Rasmus Ulslev Pedersen; Benedikt Huber (Softw. Pract. Exp., 2010)

A real-time Java chip-multiprocessor. - Christof Pitter; Martin Schoeberl (ACM Trans. Embed. Comput. Syst., 2010)

Nonblocking real-time garbage collection. - Martin Schoeberl; Wolfgang Puffitsch (ACM Trans. Embed. Comput. Syst., 2010)

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach. - Martin Schoeberl; Pascal Schleuniger; Wolfgang Puffitsch; Florian Brandner; Christian W. Probst (PPES, 2011)

Leros: A Tiny Microcontroller for FPGAs. - Martin Schoeberl (FPL, 2011)

Hardware synchronization for embedded multi-core processors. - Christian Stoif; Martin Schoeberl; Benito Liccardi; Jan Haase 001 (ISCAS, 2011)

A Time-Predictable Object Cache. - Martin Schoeberl (ISORC, 2011)

Design Space Exploration of Object Caches with Cross-Profiling. - Martin Schoeberl; Walter Binder; Alex Villazón (ISORC, 2011)

Java dust: how small can embedded Java be? - James Caska; Martin Schoeberl (JTRES, 2011)

Real-time wait-free queues using micro-transactions. - Fadi Meawad; Martin Schoeberl; Karthik Iyer; Jan Vitek (JTRES, 2011)

Memory management for safety-critical Java. - Martin Schoeberl (JTRES, 2011)

User-defined clocks in the real-time specification for Java. - Andy J. Wellings; Martin Schoeberl (JTRES, 2011)

Portable and accurate collection of calling-context-sensitive bytecode metrics for the Java virtual machine. - Aibek Sarimbekov; Andreas Sewe; Walter Binder; Philippe Moret; Martin Schoeberl; Mira Mezini (PPPJ, 2011)

ejIP: a TCP/IP stack for embedded Java. - Martin Schoeberl (PPPJ, 2011)

Introduction to the Special Issue: JTRES 2009. - Martin Schoeberl; M. Teresa Higuera-Toledano (Concurr. Comput. Pract. Exp., 2011)

A Hardware Abstraction Layer in Java. - Martin Schoeberl; Stephan Korsholm; Tomas Kalibera; Anders P. Ravn (ACM Trans. Embed. Comput. Syst., 2011)

Worst-Case Execution Time Based Optimization of Real-Time Java Programs. - Stefan Hepp; Martin Schoeberl (ISORC, 2012)

Hardware Support for Safety-Critical Java Scope Checks. - Juan Ricardo Rios; Martin Schoeberl (ISORC, 2012)

Private memory allocation analysis for safety-critical Java. - Andreas Engelbredt Dalsgaard; René Rydhof Hansen; Martin Schoeberl (JTRES, 2012)

On the scalability of time-predictable chip-multiprocessing. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2012)

Patterns for safety-critical Java memory usage. - Juan Ricardo Rios; Kelvin Nilsen; Martin Schoeberl (JTRES, 2012)

Safety-critical Java on a Java processor. - Martin Schoeberl; Juan Ricardo Rios (JTRES, 2012)

A desktop 3D printer in safety-critical Java. - Tórur Biskopstø Strøm; Martin Schoeberl (JTRES, 2012)

A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems. - Martin Schoeberl; Florian Brandner; Jens Sparsø; Evangelia Kasapaki (NOCS, 2012)

A light-weight statically scheduled network-on-chip. - Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (NORCHIP, 2012)

Static routing in symmetric real-time network-on-chips. - Florian Brandner; Martin Schoeberl (RTNS, 2012)

Is time predictability quantifiable? - Martin Schoeberl (ICSAMOS, 2012)

Worst-case execution time analysis-driven object cache design. - Benedikt Huber; Wolfgang Puffitsch; Martin Schoeberl (Concurr. Comput. Pract. Exp., 2012)

Safety-critical Java with cyclic executives on chip-multiprocessors. - Anders P. Ravn; Martin Schoeberl (Concurr. Comput. Pract. Exp., 2012)

Fast, Interactive Worst-Case Execution Time Analysis With Back-Annotation. - Trevor Harmon; Martin Schoeberl; Raimund Kirner; Raymond Klefstad; Kwang-Hae (Kane) Kim; Michael R. Lowry (IEEE Trans. Ind. Informatics, 2012)

An area-efficient network interface for a TDM-based network-on-chip. - Jens Sparsø; Evangelia Kasapaki; Martin Schoeberl (DATE, 2013)

A time-predictable stack cache. - Sahar Abbaspour; Florian Brandner; Martin Schoeberl (ISORC, 2013)

An SDRAM controller for real-time systems. - Edgar Lakis; Martin Schoeberl (ISORC, 2013)

Chip-multiprocessor hardware locks for safety-critical Java. - Tórur Biskopstø Strøm; Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2013)

Static analysis of worst-case stack cache behavior. - Alexander Jordan; Florian Brandner; Martin Schoeberl (RTNS, 2013)

Micro-transactions for concurrent data structures. - Fadi Meawad; Karthik Iyer; Martin Schoeberl; Jan Vitek (Concurr. Comput. Pract. Exp., 2013)

Hardware support for CSP on a Java chip multiprocessor. - Flavius Gruian; Martin Schoeberl (Microprocess. Microsystems, 2013)

Data cache organization for accurate timing analysis. - Martin Schoeberl; Benedikt Huber; Wolfgang Puffitsch (Real Time Syst., 2013)

A Method Cache for Patmos. - Philipp Degasperi; Stefan Hepp; Wolfgang Puffitsch; Martin Schoeberl (ISORC, 2014)

Reusable Libraries for Safety-Critical Java. - Juan Ricardo Rios; Martin Schoeberl (ISORC, 2014)

An Evaluation of Safety-Critical Java on a Java Processor. - Juan Ricardo Rios; Martin Schoeberl (ISORC, 2014)

WCET-Based Comparison of an Instruction Scratchpad and a Method Cache. - Jack Whitham; Martin Schoeberl (ISORC, 2014)

Certifiable Java for Embedded Systems. - Martin Schoeberl; Andreas Engelbredt Dalsgaard; René Rydhof Hansen; Stephan Erbs Korsholm; Anders P. Ravn; Juan Ricardo Rios Rivas; Tórur Biskopstø Strøm; Hans Søndergaard (JTRES, 2014)

Scope-Based Method Cache Analysis. - Benedikt Huber; Stefan Hepp; Martin Schoeberl (WCET, 2014)

A Time-Predictable Memory Network-on-Chip. - Martin Schoeberl; David Vh Chong; Wolfgang Puffitsch; Jens Sparsø (WCET, 2014)

Stack Caching Using Split Data Caches. - Carsten Nielsen; Martin Schoeberl (ISORC Workshops, 2015)

Models of Communication for Multicore Processors. - Martin Schoeberl; Rasmus Bo Sørensen; Jens Sparsø (ISORC Workshops, 2015)

Message Passing on a Time-predictable Multicore Processor. - Rasmus Bo Sørensen; Wolfgang Puffitsch; Martin Schoeberl; Jens Sparsø (ISORC, 2015)

Hardware Locks with Priority Ceiling Emulation for a Java Chip-Multiprocessor. - Tórur Biskopstø Strøm; Martin Schoeberl (ISORC, 2015)

Safety-Critical Java on a Time-Predictable Processor. - Stephan Erbs Korsholm; Martin Schoeberl; Wolfgang Puffitsch (JTRES, 2015)

Scala for Real-Time Systems? - Martin Schoeberl (JTRES, 2015)

Multiprocessor Priority Ceiling Emulation for Safety-Critical Java. - Tórur Biskopstø Strøm; Martin Schoeberl (JTRES, 2015)

Interfacing hardware accelerators to a time-division multiplexing network-on-chip. - Luca Pezzarossa; Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (NORCAS, 2015)

Time-division multiplexing vs network calculus: a comparison. - Wolfgang Puffitsch; Rasmus Bo Sørensen; Martin Schoeberl (RTNS, 2015)

A time-composable operating system for the Patmos processor. - Marco Ziccardi; Martin Schoeberl; Tullio Vardanega (SAC, 2015)

T-CREST: Time-predictable multi-core architecture for embedded systems. - Martin Schoeberl; Sahar Abbaspour; Benny Akesson; Neil C. Audsley; Raffaele Capasso; Jamie Garside; Kees Goossens; Sven Goossens; Scott Hansen; Reinhold Heckmann; Stefan Hepp; Benedikt Huber; et al. (J. Syst. Archit., 2015)

Lessons learned from the EU project T-CREST. - Martin Schoeberl (DATE, 2016)

Time-Predictable Virtual Memory. - Wolfgang Puffitsch; Martin Schoeberl (ISORC, 2016)

A Stack Cache for Real-Time Systems. - Martin Schoeberl; Carsten Nielsen (ISORC, 2016)

Avionics Applications on a Time-Predictable Chip-Multiprocessor. - André Rocha; Cláudio Silva 002; Rasmus Bo Sørensen; Jens Sparsø; Martin Schoeberl (PDP, 2016)

Reconfiguration in FPGA-based multi-core platforms for hard real-time applications. - Luca Pezzarossa; Martin Schoeberl; Jens Sparsø (ReCoSoC, 2016)

A Software Managed Stack Cache for Real-Time Systems. - Alexander Jordan; Sahar Abbaspour; Martin Schoeberl (RTNS, 2016)

State-based Communication on Time-predictable Multicore Processors. - Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (RTNS, 2016)

TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research. - Heiko Falk; Sebastian Altmeyer; Peter Hellinckx; Björn Lisper; Wolfgang Puffitsch; Christine Rochange; Martin Schoeberl; Rasmus Bo Sørensen; Peter Wägemann; Simon Wegener (WCET, 2016)

Support for the logical execution time model on a time-predictable multicore processor. - Florian Kluge; Martin Schoeberl; Theo Ungerer (SIGBED Rev., 2016)

Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation. - Evangelia Kasapaki; Martin Schoeberl; Rasmus Bo Sørensen; Christoph Thomas Muller; Kees Goossens; Jens Sparsø (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Improving Performance of Single-Path Code through a Time-Predictable Memory Hierarchy. - Bekim Cilku; Wolfgang Puffitsch; Daniel Prokesch; Martin Schoeberl; Peter P. Puschner (ISORC, 2017)

A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems. - Luca Pezzarossa; Martin Schoeberl; Jens Sparsø (ISORC, 2017)

Real-Time Audio Processing on the T-Crest Multicore Platform. - Daniel Sanz Ausin; Luca Pezzarossa; Martin Schoeberl (MCSoC, 2017)

Timing Organization of a Real-Time Multicore Processor. - Martin Schoeberl; Jens Sparsø (NGCAS, 2017)

A shared scratchpad memory with synchronization support. - Henrik Enggaard Hansen; Emad Jacob Maroun; Andreas Toftegaard Kristensen; Jimmi Marquart; Martin Schoeberl (NORCAS, 2017)

Can real-time systems benefit from dynamic partial reconfiguration? - Luca Pezzarossa; Andreas Toftegaard Kristensen; Martin Schoeberl; Jens Sparsø (NORCAS, 2017)

Best Practice for Caching of Single-Path Code. - Martin Schoeberl; Bekim Cilku; Daniel Prokesch; Peter P. Puschner (WCET, 2017)

Safety-critical Java for embedded systems. - Martin Schoeberl; Andreas Engelbredt Dalsgaard; René Rydhof Hansen; Stephan Erbs Korsholm; Anders P. Ravn; Juan Ricardo Rios Rivas; Tórur Biskopstø Strøm; Hans Søndergaard; Andy J. Wellings; Shuai Zhao 004 (Concurr. Comput. Pract. Exp., 2017)

Hardware locks for a real-time Java chip multiprocessor. - Tórur Biskopstø Strøm; Wolfgang Puffitsch; Martin Schoeberl (Concurr. Comput. Pract. Exp., 2017)

A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip. - Rasmus Bo Sørensen; Luca Pezzarossa; Martin Schoeberl; Jens Sparsø (J. Syst. Archit., 2017)

Lipsi: Probably the Smallest Processor in the World. - Martin Schoeberl (ARCS, 2018)

One-way shared memory. - Martin Schoeberl (DATE, 2018)

Design of a time-predictable multicore processor: The T-CREST project. - Martin Schoeberl (DATE, 2018)

Faster Function Blocks for Precision Timed Industrial Automation. - Hammond A. Pearce; Partha S. Roop; Morteza Biglari-Abhari; Martin Schoeberl (ISORC, 2018)

tpIP: A Time-Predictable TCP/IP Stack for Cyber-Physical Systems. - Martin Schoeberl; Rasmus Ulslev Pedersen (ISORC, 2018)

Hardlock: A Concurrent Real-Time Multicore Locking Unit. - Tórur Biskopstø Strøm; Martin Schoeberl (ISORC, 2018)

Time-Predictable Distributed Shared Memory for Multi-Core Processors. - Morten B. Petersen; Anthon V. Riber; Simon T. Andersen; Martin Schoeberl (NORCAS, 2018)

Hardware Assisted Clock Synchronization with the IEEE 1588-2008 Precision Time Protocol. - Eleftherios Kyriakakis; Jens Sparsø; Martin Schoeberl (RTNS, 2018)

A Multicore Processor for Time-Critical Applications. - Martin Schoeberl; Luca Pezzarossa; Jens Sparsø (IEEE Des. Test, 2018)

Direct garbage collection: two-fold speedup for managed language embedded systems. - Rasmus Ulslev Pedersen; Martin Schoeberl (Int. J. Embed. Syst., 2018)

Using dynamic partial reconfiguration of FPGAs in real-Time systems. - Luca Pezzarossa; Andreas Toftegaard Kristensen; Martin Schoeberl; Jens Sparsø (Microprocess. Microsystems, 2018)

Patmos: a time-predictable microprocessor. - Martin Schoeberl; Wolfgang Puffitsch; Stefan Hepp; Benedikt Huber; Daniel Prokesch (Real Time Syst., 2018)

Leros: The Return of the Accumulator Machine. - Martin Schoeberl; Morten Borup Petersen (ARCS, 2019)

A Minimal Network Interface for a Simple Network-on-Chip. - Martin Schoeberl; Luca Pezzarossa; Jens Sparsø (ARCS, 2019)

Towards Formal Co-validation of Hardware and Software Timing Models of CPSs. - Mihail Asavoae; Imane Haur; Mathieu Jan; Belgacem Ben Hedia; Martin Schoeberl (CyPhy/WESE, 2019)

Multicore Models of Communication for Cyber-Physical Systems. - Martin Schoeberl (CyPhy/WESE, 2019)

Actors Revisited for Time-Critical Systems. - Marten Lohstroh; Martin Schoeberl; Andrés Goens; Armin Wasicek; Christopher D. Gill; Marjan Sirjani; Edward A. Lee (DAC, 2019)

Scratchpad Memories with Ownership. - Martin Schoeberl; Tórur Biskopstø Strøm; Oktay Baris; Jens Sparsø (DATE, 2019)

Programs with ironclad timing guarantees: work-in-progress. - Marten Lohstroh; Martin Schoeberl; Mathieu Jan; Edward Wang; Edward A. Lee (EMSOFT Companion, 2019)

Implementing time-triggered communication over a standard ethernet switch. - Eleftherios Kyriakakis; Jens Sparsø; Martin Schoeberl (IoT-Fog@IoTDI, 2019)

Demonstration of a Time-predictable Flight Controller on a Multicore Processor. - Oktay Baris; Shibarchi Majumder; Tórur Biskopstø Strøm; Anders la Cour-Harbo; Jens Sparsø; Thomas Bak; Martin Schoeberl (ISORC, 2019)

A Time-predictable TTEthenet Node. - Maja Lund; Luca Pezzarossa; Jens Sparsø; Martin Schoeberl (ISORC, 2019)

S4NOC: a minimalistic network-on-chip for real-time multicores. - Martin Schoeberl; Luca Pezzarossa; Jens Sparsø (NoCArc@MICRO, 2019)

A Fault-Tolerant Time-Predictable Processor. - Christos Gkiokas; Martin Schoeberl (NORCAS, 2019)

A time-predictable branch predictor. - Martin Schoeberl; Benjamin Rouxel; Isabelle Puaut (SAC, 2019)

Hardlock: Real-time multicore locking. - Tórur Biskopstø Strøm; Jens Sparsø; Martin Schoeberl (J. Syst. Archit., 2019)

Time-predictable synchronization support with a shared scratchpad memory. - Emad Jacob Maroun; Henrik Enggaard Hansen; Andreas Toftegaard Kristensen; Martin Schoeberl (Microprocess. Microsystems, 2019)

Time-predictable distributed shared on-chip memory. - Morten B. Petersen; Anthon V. Riber; Simon T. Andersen; Martin Schoeberl (Microprocess. Microsystems, 2019)

Formal Semantics of Predictable Pipelines: a Comparative Study. - Mathieu Jan; Mihail Asavoae; Martin Schoeberl; Edward A. Lee (ASP-DAC, 2020)

Synchronizing Real-Time Tasks in Time-Aware Networks: Work-in-Progress. - Eleftherios Kyriakakis; Jens Sparsø; Peter P. Puschner; Martin Schoeberl (EMSOFT, 2020)

Towards Dual-Issue Single-Path Code. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (ISORC, 2020)

A time-predictable open-source TTEthernet end-system. - Eleftherios Kyriakakis; Maja Lund; Luca Pezzarossa; Jens Sparsø; Martin Schoeberl (J. Syst. Archit., 2020)

Evaluating a Time-Triggered Runtime System by Distributing a Flight Controller. - Eleftherios Kyriakakis; Jens Sparsø; Martin Schoeberl (ETFA, 2021)

Experiences from Adjusting Industrial Software for Worst-Case Execution Time Analysis. - Patrick Denzler; Thomas Frühwirth; Andreas Kirchberger; Martin Schoeberl; Wolfgang Kastner (ISORC, 2021)

Synchronizing Real-Time Tasks in Time-Triggered Networks. - Eleftherios Kyriakakis; Jens Sparsø; Peter P. Puschner; Martin Schoeberl (ISORC, 2021)

Fault-tolerant Clock Synchronization using Precise Time Protocol Multi-Domain Aggregation. - Eleftherios Kyriakakis; Koen Tange; Niklas Reusch; Eder Ollora Zaballa; Xenofon Fafoutis; Martin Schoeberl; Nicola Dragoni (ISORC, 2021)

ChiselVerify: An Open-Source Hardware Verification Library for Chisel and Scala. - Andrew Dobis; Tjark Petersen; Hans Jakob Damsgaard; Kasper Juul Hesse Rasmussen; Enrico Tolotto; Simon Thye Andersen; Richard Lin; Martin Schoeberl (NorCAS, 2021)

Accelerator Interface for Patmos. - Clemens Pircher; Alexander Baranyai; Christoph Lehr; Martin Schoeberl (NorCAS, 2021)

Static Timing Analysis of OPC UA PubSub. - Patrick Denzler; Thomas Frühwirth; Andreas Kirchberger; Martin Schoeberl; Wolfgang Kastner (WFCS, 2021)

Open-Source Verification with Chisel and Scala. - Andrew Dobis; Tjark Petersen; Kasper Juul Hesse Rasmussen; Enrico Tolotto; Hans Jakob Damsgaard; Simon Thye Andersen; Richard Lin; Martin Schoeberl (CoRR, 2021)

Compiling for time-predictability with dual-issue single-path code. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (J. Syst. Archit., 2021)

Keynote Speakers. - Martin Schoeberl (DSD, 2022)

Open-Source Research on Time-predictable Computer Architecture. - Martin Schoeberl (DSD, 2022)

Enabling Coverage-Based Verification in Chisel. - Andrew Dobis; Hans Jakob Damsgaard; Enrico Tolotto; Kasper Hesse; Tjark Petersen; Martin Schoeberl (ETS, 2022)

Open-Source Chip Design in Academic Education. - Syed Anas Alam; Jakob Furbo Enevoldsen; Andreas Alkjaer Eriksen; Niels William Hartmann; Ulrik Helk; Jphirgen Kragh Jakobsen; Christa Skytte Jensen; Nicolai Dyre Bülow Jespersen; Karl Herman Krause; Mads Rumle Nordstrphim; Tjark Petersen; Luca Pezzarossa; et al. (NorCAS, 2022)

Timing Analysis of TSN-Enabled OPC UA PubSub. - Patrick Denzler; Thomas Frühwirth; Daniel Scheuchenstuhl; Martin Schoeberl; Wolfgang Kastner (WFCS, 2022)

Towards Comparing Performance of Algorithms in Hardware and Software. - Maja H. Kirkeby; Martin Schoeberl (CoRR, 2022)

Energy Consumption and Performance of Heapsort in Hardware and Software. - Maja H. Kirkeby; Thomas Krabben; Mathias Marquar Arhipenko Larsen; Maria Bendix Mikkelsen; Tjark Petersen; Mads Rosendahl; Martin Schoeberl; Martin Sundman (CoRR, 2022)

Comparing timed-division multiplexing and best-effort networks-on-chip. - Jens Sparsø; Hans Jakob Damsgaard; Dimitrios Katsamanis; Martin Schoeberl (J. Syst. Archit., 2022)

InterPRET: a Time-predictable Multicore Processor. - Erling Rennemo Jellum; Shaokai Lin; Peter Donovan; Chadlia Jerad; Edward Wang; Marten Lohstroh; Edward A. Lee; Martin Schoeberl (CPS-IoT Week Workshops, 2023)

On the Feasibility of using FPGA's for Efficient Topology Optimization. - Kasper Hesse; Martin Schoeberl; Niels Aage; Erik Träff (DSD, 2023)

FPGA-tidbits: Rapid Prototyping of FPGA Accelerators in Chisel. - Erling Rennemo Jellum; Yaman Umuruglu; Milica Orlandic; Martin Schoeberl (DSD, 2023)

Compiler-Directed Constant Execution Time on Flat Memory Systems. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (ISORC, 2023)

Dynamic nsNET2: Efficient Deep Noise Suppression with Early Exiting. - Riccardo Miccini; Alaa Zniber; Clément Laroche; Tobias Piechowiak; Martin Schoeberl; Luca Pezzarossa; Ouassim Karrakchou; Jens Sparsø; Mounir Ghogho (MLSP, 2023)

Transitioning to Chisel in University Education: Experiences and Lessons Learned. - Luca Pezzarossa; Martin Schoeberl (NorCAS, 2023)

Constant-Loop Dominators for Single-Path Code Optimization. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (WCET, 2023)

Verification of Chisel Hardware Designs with ChiselVerify. - Andrew Dobis; Kevin Laeufer; Hans Jakob Damsgaard; Tjark Petersen; Kasper Juul Hesse Rasmussen; Enrico Tolotto; Simon Thye Andersen; Richard Lin; Martin Schoeberl (Microprocess. Microsystems, 2023)

Chip Design and Verification in a Computer Engineering Education. - Martin Schoeberl; Luca Pezzarossa (Computer, 2023)

Hardware Generators with Chisel. - Martin Schoeberl; Hans Jakob Damsgaard; Luca Pezzarossa; Oliver Keszöcze; Erling Rennemo Jellum (DSD, 2024)

NeuralCasting: A Front-End Compilation Infrastructure for Neural Networks. - Alessandro Cerioli; Riccardo Miccini; Clément Laroche; Tobias Piechowiak; Luca Pezzarossa; Jens Sparsø; Martin Schoeberl (IOTSMS, 2024)

Towards Lingua Franca on the Patmos Processor. - Ehsan Khodadad; Luca Pezzarossa; Martin Schoeberl (ISORC, 2024)

Two-Step Register Allocation for Implementing Single-Path Code. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (ISORC, 2024)

Exploration of Network Interface Architectures for a Real-Time Network-on-Chip. - Martin Schoeberl (ISORC, 2024)

Caching in a Mixed-Criticality 5G Radio Base Station. - Emad Jacob Maroun; Luca Pezzarossa; Martin Schoeberl (RAW, 2024)

The Platin Multi-Target Worst-Case Analysis Tool. - Emad Jacob Maroun; Eva Dengler; Christian Dietrich 001; Stefan Hepp; Henriette Herzog; Benedikt Huber; Jens Knoop; Daniel Wiltsche-Prokesch; Peter P. Puschner; Phillip Raffeck; Martin Schoeberl; Simon Schuster; et al. (WCET, 2024)

Invited Paper: Worst-Case Execution Time Analysis of Lingua Franca Applications. - Martin Schoeberl; Ehsan Khodadad; Shaokai Lin; Emad Jacob Maroun; Luca Pezzarossa; Edward A. Lee (WCET, 2024)

Predictable and optimized single-path code for predicated processors. - Emad Jacob Maroun; Martin Schoeberl; Peter P. Puschner (J. Syst. Archit., 2024)

Codesign of Reactor-Oriented Hardware and Software for Cyber-Physical Systems. - Erling Rennemo Jellum; Martin Schoeberl; Edward Ashford Lee; Milica Orlandic (ACM Trans. Reconfigurable Technol. Syst., 2024)

Programming Time-Predictable Processors with Lingua Franca. - Magnus Mæhlum; Erling Rennemo Jellum; Shaokai Lin; Marten Lohstroh; Martin Schoeberl; Sverre Hendseth; Edward A. Lee (NG-RES@HiPEAC, 2025)

Neural Architecture Search for Efficient Mixed-Precision Quantization in Audio Denoising. - Alessandro Cerioli; Clément Laroche; Tobias Piechowiak; Luca Pezzarossa; Martin Schoeberl (PerCom Workshops, 2025)

Energy-efficiency of software and hardware algorithms. - Maja H. Kirkeby; Thomas Krabben; Maria Bendix Mikkelsen; Mads Rosendahl; Mathias Marquar Arhipenko Larsen; Martin Sundman; Tjark Petersen; Martin Schoeberl (Comput. Sci. Inf. Syst., 2025)

Wildcat: Educational RISC-V Microprocessors. - Martin Schoeberl (CoRR, 2025)