Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes. - Martino Dazzi; Pierpaolo Palestri; Davide Rossi; Andrea Bandiziol; Igor Loi; David E. Bellasi; Luca Benini (ISCAS, 2018)

A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET. - Alessandro Cevrero; Ilter Özkaya; Pier Andrea Francese; Matthias Brändli; Christian Menolfi; Thomas Morf; Marcel A. Kossel; Lukas Kull; Danny Luu; Martino Dazzi; Thomas Toifl (ISSCC, 2019)

A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces. - Alessio Cortiula; Martino Dazzi; Mattia Marcon; Davide Menin; Marco Scapol; Andrea Bandiziol; Andrea Cristofoli; Werner Grollitsch; Roberto Nonis; Pierpaolo Palestri (MIPRO, 2019)

Computational memory-based inference and training of deep neural networks. - Abu Sebastian; Irem Boybat; Martino Dazzi; Iason Giannopoulos; Vara Prasad Jonnalagadda; Vinay Joshi; Geethan Karunaratne; Benedikt Kersting; Riduan Khaddam-Aljameh; S. R. Nandakumar; Anastasios Petropoulos; Christophe Piveteau; et al. (VLSI Circuits, 2019)

Accurate deep neural network inference using computational phase-change memory. - Vinay Joshi; Manuel Le Gallo; Irem Boybat; Simon Haefeli; Christophe Piveteau; Martino Dazzi; Bipin Rajendran; Abu Sebastian; Evangelos Eleftheriou (CoRR, 2019)

5 Parallel Prism: A topology for pipelined implementations of convolutional neural networks using computational memory. - Martino Dazzi; Abu Sebastian; Pier Andrea Francese; Thomas P. Parnell; Luca Benini; Evangelos Eleftheriou (CoRR, 2019)

Deep learning acceleration based on in-memory computing. - Evangelos Eleftheriou; Manuel Le Gallo; S. R. Nandakumar; Christophe Piveteau; Irem Boybat; Vinay Joshi; Riduan Khaddam-Aljameh; Martino Dazzi; Iason Giannopoulos; Geethan Karunaratne; Benedikt Kersting; Milos Stanisavljevic; et al. (IBM J. Res. Dev., 2019)

Compiling Neural Networks for a Computational Memory Accelerator. - Kornilios Kourtis; Martino Dazzi; Nikolas Ioannou; Tobias Grosser; Abu Sebastian; Evangelos Eleftheriou (CoRR, 2020)

Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors. - Sergi Abadal; Robert Guirado; Hamidreza Taghvaee; Akshay Jain 001; Elana Pereira de Santana; Peter Haring Bolívar; Mohamed Saeed Elsayed; Renato Negra; Zhenxing Wang; Kun-Ta Wang; Max Christian Lemme; Joshua Alexander Harrison Klein; et al. (CoRR, 2020)

Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH). - Joshua Alexander Harrison Klein; Alexandre Levisse; Giovanni Ansaloni; David Atienza; Marina Zapater; Martino Dazzi; Geethan Karunaratne; Irem Boybat; Abu Sebastian; Davide Rossi; Francesco Conti 001; Elana Pereira de Santana; et al. (CF, 2021)

A Fully-Integrated 5mW, 0.8Gbps Energy-Efficient Chip-to-Chip Data Link for Ultra-Low-Power IoT End-Nodes in 65-nm CMOS. - Hayate Okuhara; Ahmed Elnaqib; Martino Dazzi; Pierpaolo Palestri; Simone Benatti; Luca Benini; Davide Rossi (CoRR, 2021)

Accelerating Inference of Convolutional Neural Networks Using In-memory Computing. - Martino Dazzi; Abu Sebastian; Luca Benini; Evangelos Eleftheriou (Frontiers Comput. Neurosci., 2021)

Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification. - Martino Dazzi; Abu Sebastian; Thomas P. Parnell; Pier Andrea Francese; Luca Benini; Evangelos Eleftheriou (IEEE Trans. Computers, 2021)

A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS. - Hayate Okuhara; Ahmed Elnaqib; Martino Dazzi; Pierpaolo Palestri; Simone Benatti; Luca Benini; Davide Rossi (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Accelerating Inference of CNNs with In-Memory Computing. - Martino Dazzi (2021)

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. - Manuel Le Gallo; Riduan Khaddam-Aljameh; Milos Stanisavljevic; Athanasios Vasilopoulos; Benedikt Kersting; Martino Dazzi; Geethan Karunaratne; Matthias Braendli; Abhairaj Singh; Silvia M. Mueller; Julian Büchel; Xavier Timoneda Comas; et al. (CoRR, 2022)

ALPINE: Analog In-Memory Acceleration With Tight Processor Integration for Deep Learning. - Joshua Alexander Harrison Klein; Irem Boybat; Yasir Mahmood Qureshi; Martino Dazzi; Alexandre Levisse; Giovanni Ansaloni; Marina Zapater; Abu Sebastian; David Atienza (IEEE Trans. Computers, 2023)

Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors. - Sergi Abadal; Robert Guirado; Hamidreza Taghvaee; Akshay Jain 001; Elana Pereira de Santana; Peter Haring Bolívar; Mohamed Saeed; Renato Negra; Zhenxing Wang; Kun-Ta Wang; Max Christian Lemme; Joshua Alexander Harrison Klein; et al. (IEEE Wirel. Commun., 2023)

11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. - Pascal Alexander Hager; Bert Moons; Stefan Cosemans; Ioannis A. Papistas; Bram Rooseleer; Jeroen Van Loon; Roel Uytterhoeven; Florian Zaruba; Spyridoula Koumousi; Milos Stanisavljevic; Stefan Mach; Sebastiaan Mutsaards; et al. (ISSCC, 2024)

EfQAT: An Efficient Framework for Quantization-Aware Training. - Saleh Ashkboos; Bram Verhoef; Torsten Hoefler; Evangelos Eleftheriou; Martino Dazzi (CoRR, 2024)

KurTail : Kurtosis-based LLM Quantization. - Mohammad Sadegh Akhondzadeh; Aleksandar Bojchevski; Evangelos Eleftheriou; Martino Dazzi (CoRR, 2025)