Mind the Gap: Studying the Insecurity of Provably Secure Embedded Trusted Execution Architectures. - Marton Bognar; Jo Van Bulck; Frank Piessens (SP, 2022)

ShowTime: Amplifying Arbitrary CPU Timing Side Channels. - Antoon Purnal; Marton Bognar; Frank Piessens; Ingrid Verbauwhede (AsiaCCS, 2023)

MicroProfiler: Principled Side-Channel Mitigation through Microarchitectural Profiling. - Marton Bognar; Hans Winderix; Jo Van Bulck; Frank Piessens (EuroS&P, 2023)

ProSpeCT: Provably Secure Speculation for the Constant-Time Policy. - Lesly-Ann Daniel; Marton Bognar; Job Noorman; Sébastien Bardin; Tamara Rezk; Frank Piessens (USENIX Security Symposium, 2023)

ProSpeCT: Provably Secure Speculation for the Constant-Time Policy (Extended version). - Lesly-Ann Daniel; Marton Bognar; Job Noorman; Sébastien Bardin; Tamara Rezk; Frank Piessens (CoRR, 2023)

Libra: Architectural Support For Principled, Secure And Efficient Balanced Execution On High-End Processors. - Hans Winderix; Marton Bognar; Lesly-Ann Daniel; Frank Piessens (CCS, 2024)

Architectural Mimicry: Innovative Instructions to Efficiently Address Control-Flow Leakage in Data-Oblivious Programs. - Hans Winderix; Marton Bognar; Job Noorman; Lesly-Ann Daniel; Frank Piessens (SP, 2024)

Intellectual Property Exposure: Subverting and Securing Intellectual Property Encapsulation in Texas Instruments Microcontrollers. - Marton Bognar; Cas Magnus; Frank Piessens; Jo Van Bulck (USENIX Security Symposium, 2024)

Libra: Architectural Support For Principled, Secure And Efficient Balanced Execution On High-End Processors (Extended Version). - Hans Winderix; Marton Bognar; Lesly-Ann Daniel; Frank Piessens (CoRR, 2024)

openIPE: An Extensible Memory Isolation Framework for Microcontrollers. - Marton Bognar; Jo Van Bulck (EuroS&P, 2025)

Wait a Cycle: Eroding Cryptographic Trust in Low-End Tees via Timing Side Channels. - Ruben Van Dijck; Marton Bognar; Jo Van Bulck (EuroS&P (Workshops), 2025)