An Arithmetic Unit for on-Line Computation - Mary Jane Irwin (1977)

Reconfigurable Pipeline Systems. - Mary Jane Irwin (ACM Annual Conference (1), 1978)

A Pipelined Processing Unit for On-Line Division. - Mary Jane Irwin (ISCA, 1978)

On-Line Algorithms for the Design of Pipeline Architectures. - Robert Michael Owens; Mary Jane Irwin (ISCA, 1979)

Reduction of broadband noise in speech by spectral weighting. - Mary Jane Irwin (ICASSP, 1980)

Online Pipeline Systems for Recursive Numeric Computations. - Mary Jane Irwin; Don Heller (ISCA, 1980)

A rational arithmetic processor. - Mary Jane Irwin; Dwight R. Smith (IEEE Symposium on Computer Arithmetic, 1981)

A digit online arithmetic simulator. - Bryan Gerard Mackay; Mary Jane Irwin (ICPP, 1982)

Numerical limitations on the design of digit online networks. - Robert Michael Owens; Mary Jane Irwin (IEEE Symposium on Computer Arithmetic, 1983)

Fully Digit On-Line Networks. - Mary Jane Irwin; Robert Michael Owens (IEEE Trans. Computers, 1983)

Regular, area-time efficient carry-lookahead adders. - Tin-Fook Ngai; Mary Jane Irwin (IEEE Symposium on Computer Arithmetic, 1985)

Design and implementation of real time video processor. - Shishpal Rawat; Poras T. Balsara; Mary Jane Irwin; Tom Mackowiak (ICASSP, 1986)

Regular Area-Time Efficient Carry-Lookahead Adders. - Tin-Fook Ngai; Mary Jane Irwin; Shishpal Rawat (J. Parallel Distributed Comput., 1986)

Secretary/Treasurer's Report. - Mary Jane Irwin (SIGARCH Comput. Archit. News, 1986)

A System for Designing, Simulating, and Testing High Performance VLSI Signal Processors. - Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Mesh Arrays and LOGICIAN: A Tool for Their Efficient Generation. - Jared A. Beekman; Robert Michael Owens; Mary Jane Irwin (DAC, 1987)

An Overview of the Penn State Design System. - Robert Michael Owens; Mary Jane Irwin (DAC, 1987)

Digit-Pipelined Arithmetic as Illustrated By the Paste-Up System: A Tutorial. - Mary Jane Irwin; Robert Michael Owens (Computer, 1987)

The Arithmetic Cube. - Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Computers, 1987)

Fast Methods for Switch-Level Verification of MOS Circuits. - Douglas S. Reeves; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

Digit pipelined processors. - Mary Jane Irwin; Robert Michael Owens (J. Supercomput., 1987)

DECOMPOSER: A Synthesizer for Systolic Systems. - Pao-Po Hou; Robert Michael Owens; Mary Jane Irwin (DAC, 1988)

Multidimensional algorithms for VLSI processors. - Robert Michael Owens; Mary Jane Irwin (ICASSP, 1988)

A comparison of two digit serial VLSI adders. - Mary Jane Irwin; Robert Michael Owens (ICCD, 1988)

Special Issue on Parallelism in Computer Arithmetic. - Mary Jane Irwin (J. Parallel Distributed Comput., 1988)

A digit pipelined dynamic time warp processor [word recognition]. - Mary Jane Irwin (IEEE Trans. Acoust. Speech Signal Process., 1988)

Multi-Level Logic Synthesis Using Communication Complexity. - TingTing Hwang; Robert Michael Owens; Mary Jane Irwin (DAC, 1989)

A Comparison of Four Two-dimensional Gate Matrix Layout Tools. - Mary Jane Irwin; Robert Michael Owens (DAC, 1989)

Implementing algorithms for convolution on arrays of adders. - Robert Michael Owens; Mary Jane Irwin (ICASSP, 1989)

Distributed Fault Diagnosis in the Butterfly Parallel Processor. - Tsang-Ling Sheu; Woei Lin; Chita R. Das; Mary Jane Irwin (ICPP (1), 1989)

Mapping high-dimension wavefront computations to silicon. - Chen-Mie Wu; Robert Michael Owens; Mary Jane Irwin (ASAP, 1990)

A two-dimensional, distributed logic processor for machine vision. - Mary Jane Irwin; Robert Michael Owens (ICASSP, 1990)

Distortion processing in image matching problems. - Chen-Mi Wu; Robert Michael Owens; Mary Jane Irwin (ICASSP, 1990)

Logic synthesis for programmable logic devices. - TingTing Hwang; Robert Michael Owens; Mary Jane Irwin (ICCD, 1990)

Test generation in circuits constructed by input decomposition. - Gueesang Lee; Mary Jane Irwin; Robert Michael Owens (ICCD, 1990)

An integrated, multi-level synthesis system. - Barry M. Pangrle; Pao-Po Hou; Robert Michael Owens; Mary Jane Irwin (RSP, 1990)

Being Stingy with Multipliers. - Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Computers, 1990)

Exploiting communication complexity for multilevel logic synthesis. - TingTing Hwang; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

A case for digit serial VLSI signal processors. - Mary Jane Irwin; Robert Michael Owens (J. VLSI Signal Process., 1990)

The Arithmetic Cube: error analysis and simulation. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ASAP, 1991)

The arithmetic cube II: a second generation VLSI DSP processor. - Mary Jane Irwin; Robert Michael Owens; Thomas P. Kelliher; Kin-Ki Leung; Mohan Vishwanath (ICASSP, 1991)

Digit Serial Multipliers. - Poras T. Balsara; Robert Michael Owens; Mary Jane Irwin (J. Parallel Distributed Comput., 1991)

A Two-Dimensional, Distributed Logic Architecture. - Mary Jane Irwin; Robert Michael Owens (IEEE Trans. Computers, 1991)

Image processing on a memory array architecture. - Poras T. Balsara; Mary Jane Irwin (J. VLSI Signal Process., 1991)

Implementing a family of high performance, micrograined architectures. - Robert Michael Owens; Mary Jane Irwin; Thomas P. Kelliher; Mohan Vishwanath; Raminder Singh Bajwa (ASAP, 1992)

Discrete wavelet transforms in VLSI. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ASAP, 1992)

Experiments with a Performance Driven Module Generator. - Soohong Kim; Robert Michael Owens; Mary Jane Irwin (DAC, 1992)

PERFLEX: a performance driven module generator. - Soohong Kim; Robert Michael Owens; Mary Jane Irwin (EURO-DAC, 1992)

A micro-grained VLSI signal processor. - Mary Jane Irwin; Robert Michael Owens (ICASSP, 1992)

ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (VLSI Design, 1992)

Intermediate-level vision tasks on a memory array architecture. - Poras T. Balsara; Mary Jane Irwin (Mach. Vis. Appl., 1992)

ELM-A Fast Addition Algorithm Discovered by a Program. - Thomas P. Kelliher; Robert Michael Owens; Mary Jane Irwin; TingTing Hwang (IEEE Trans. Computers, 1992)

Efficiently computing communication complexity for multilevel logic synthesis. - TingTing Hwang; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Digit systolic algorithms for fine-grain architectures. - Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (ASAP, 1993)

A new optimization driven clustering algorithm for large circuits. - Cheng-Liang Ding; Ching-Yen Ho; Mary Jane Irwin (EURO-DAC, 1993)

Multi-way FSM decomposition based on interconnect complexity. - Wen-Lin Yang; Robert Michael Owens; Mary Jane Irwin (EURO-DAC, 1993)

A systolic VLSI architecture for multi-dimensional transforms. - Thomas P. Kelliher; Mary Jane Irwin (ICASSP (1), 1993)

Edge detection using fine-grained parallelism in VLSI. - Chetana Nagendra; Manjit Borah; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ICASSP (1), 1993)

A new blocked IIR algorithm. - Chen-Mi Wu; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ICASSP (3), 1993)

Image Processing with the MGAP: A Cost Effective Solution. - Raminder Singh Bajwa; Robert Michael Owens; Mary Jane Irwin (IPPS, 1993)

A Massively Parallel, Micro-Grained VLSI Architecture. - Raminder Singh Bajwa; Robert Michael Owens; Mary Jane Irwin (VLSI Design, 1993)

The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. - Robert Michael Owens; Thomas P. Kelliher; Mary Jane Irwin; Mohan Vishwanath; Raminder Singh Bajwa; Wen-Lin Yang (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Rapid prototyping with programmable control paths. - Raminder Singh Bajwa; Chetana N. Keltcher; Paul Keltcher; Mary Jane Irwin (ASAP, 1994)

A SIMD solution to the sequence comparison problem on the MGAP. - Manjit Borah; Raminder Singh Bajwa; Sridhar Hannenhalli; Mary Jane Irwin (ASAP, 1994)

FPGA-based synthesis of FSMs through decomposition. - Wen-Lin Yang; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1994)

The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS. - Manjit Borah; Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (HICSS (1), 1994)

Digit pipelined discrete wavelet transform. - Chetana Nagendra; Mary Jane Irwin; Robert Michael Owens (ICASSP (2), 1994)

Dynamic Space Warping Algorithms on Fine-Graln Array Processors. - Heung-Nam Kim; Mary Jane Irwin; Robert Michael Owens; Chen-Mi Wu (IPPS, 1994)

Area Time Trade-Offs in Micro-Grain VLSI Array Architectures. - Raminder Singh Bajwa; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Computers, 1994)

Polynomial Time Testability of Circuits Generated by Input Decomposition. - Gueesang Lee; Mary Jane Irwin; Robert Michael Owens (IEEE Trans. Computers, 1994)

An edge-based heuristic for Steiner routing. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Logic synthesis for field-programmable gate arrays. - TingTing Hwang; Robert Michael Owens; Mary Jane Irwin; Kuo-Hua Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Power-delay characteristics of CMOS adders. - Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Reducing the number of counters needed for integer multiplication. - Robert Michael Owens; Raminder Singh Bajwa; Mary Jane Irwin (IEEE Symposium on Computer Arithmetic, 1995)

The MGAP's programming environment and the *C++ language. - Raminder Singh Bajwa; Robert Michael Owens; Mary Jane Irwin (ASAP, 1995)

Motion Estimation Algorithms on Fine Grain Array Processor. - Heung-Nam Kim; Mary Jane Irwin; Robert Michael Owens (ASAP, 1995)

Accurate Estimation of Combinational Circuit Activity. - Huzefa Mehta; Manjit Borah; Robert Michael Owens; Mary Jane Irwin (DAC, 1995)

Fast algorithm for performance-oriented Steiner routing. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1995)

The MGAP-2: an advanced, massively parallel VLSI signal processor. - Thomas P. Kelliher; Eric Gayles; Robert Michael Owens; Mary Jane Irwin (ICASSP, 1995)

High-throughput and low-power DSP using clocked-CMOS circuitry. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (ISLPD, 1995)

Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (ISLPD, 1995)

Unifying carry-sum and signed-digital number representations for low power. - Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (ISLPD, 1995)

A simulation methodology for evaluating parallel computers. - Paul Keltcher; Robert Michael Owens; Mary Jane Irwin (SPDP, 1995)

Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering. - Manjit Borah; Mary Jane Irwin; Robert Michael Owens (VLSI Design, 1995)

Digit pipelined arithmetic on fine-grain array processors. - Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (J. VLSI Signal Process., 1995)

Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline. - Kevin P. Acken; Mary Jane Irwin; Robert Michael Owens; Amulya K. Garga (ASAP, 1996)

An Architectural Design For Parallel Fractal Compression. - Kevin P. Acken; Heung-Nam Kim; Mary Jane Irwin; Robert Michael Owens (ASAP, 1996)

Energy Characterization based on Clustering. - Huzefa Mehta; Robert Michael Owens; Mary Jane Irwin (DAC, 1996)

Recent Developments in Performance Driven Steiner Routing: An Overview. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1996)

Some Issues in Gray Code Addressing. - Huzefa Mehta; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1996)

Instruction level power profiling. - Huzefa Mehta; Robert Michael Owens; Mary Jane Irwin (ICASSP, 1996)

Design tradeoffs in CMOS FIR filters. - Chetana Nagendra; Mary Jane Irwin (ICASSP, 1996)

Power comparisons for barrel shifters. - Kevin P. Acken; Mary Jane Irwin; Robert Michael Owens (ISLPED, 1996)

Design tradeoffs in high speed multipliers and FIR filters. - Chetana Nagendra; Robert Michael Owens; Mary Jane Irwin (VLSI Design, 1996)

Transistor sizing for low power CMOS circuits. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

An optimal time multiplication free algorithm for edge detection on a mesh. - Manjit Borah; Chetana Nagendra; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (J. VLSI Signal Process., 1996)

The MGAP Family of Processor Arrays. - Kevin P. Acken; Eric Gayles; Thomas P. Kelliher; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1997)

A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines. - Eric Gayles; Kevin P. Acken; Robert Michael Owens; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1997)

Mixed-autonomy local interconnect for reconfigurable SIMD arrays. - Raminder Singh Bajwa; Robert Michael Owens; Mary Jane Irwin (HiPC, 1997)

An extended addressing mode for low power. - Atul Kalambur; Mary Jane Irwin (ISLPED, 1997)

Techniques for low energy software. - Huzefa Mehta; Robert Michael Owens; Mary Jane Irwin; Rita Yu Chen; Debashree Ghosh (ISLPED, 1997)

A Simulation Methodology for Software Energy Evaluation. - Huzefa Mehta; Robert Michael Owens; Mary Jane Irwin (VLSI Design, 1997)

Power-Area Trade-Offs in Divided Word Line Memory Arrays. - Meng-Fan Chang; Mary Jane Irwin; Robert Michael Owens (J. Circuits Syst. Comput., 1997)

Motion Analysis on the Micro Grained Array Processor. - Heung-Nam Kim; Mary Jane Irwin; Robert Michael Owens (Real Time Imaging, 1997)

A fast algorithm for minimizing the Elmore delay to identified critical sinks. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Validation of an Architectural Level Power Analysis Technique. - Rita Yu Chen; Robert Michael Owens; Mary Jane Irwin; Raminder Singh Bajwa (DAC, 1998)

Number representations for reducing switched capacitance in subband coding. - John R. Sacha; Mary Jane Irwin (ICASSP, 1998)

Aggressive Dynamic Execution of Multimedia Kernel Traces. - Benjamin Bishop; Robert Michael Owens; Mary Jane Irwin (IPPS/SPDP, 1998)

The logarithmic number system for strength reduction in adaptive filtering. - John R. Sacha; Mary Jane Irwin (ISLPED, 1998)

A Parallel ASIC Architecture for Efficient Fractal Image Coding. - Kevin P. Acken; Mary Jane Irwin; Robert Michael Owens (J. VLSI Signal Process., 1998)

Editorial Message. - Mary Jane Irwin; Sun-Yuan Kung; Earl E. Swartzlander Jr. (J. VLSI Signal Process., 1998)

The Design of a Register Renaming Unit. - Benjamin Bishop; Thomas P. Kelliher; Mary Jane Irwin (Great Lakes Symposium on VLSI, 1999)

Databus charge recovery: practical considerations. - Benjamin Bishop; Mary Jane Irwin (ISLPED, 1999)

A Fast and Simple Steiner Routing Heuristic. - Manjit Borah; Robert Michael Owens; Mary Jane Irwin (Discret. Appl. Math., 1999)

Aggressive Dynamic Execution of Decoded Traces. - Benjamin Bishop; Thomas P. Kelliher; Robert Michael Owens; Mary Jane Irwin (J. VLSI Signal Process., 1999)

Energy-oriented compiler optimizations for partitioned memory architectures. - Victor Delaluz; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (CASES, 2000)

The design and use of simplepower: a cycle-accurate energy estimation tool. - Wu Ye; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (DAC, 2000)

SPARTA: Simulation of Physics on a Real-Time Architecture. - Benjamin Bishop; Thomas P. Kelliher; Mary Jane Irwin (ACM Great Lakes Symposium on VLSI, 2000)

A comparative study of power efficient SRAM designs. - Jeyran Hezavei; Narayanan Vijaykrishnan; Mary Jane Irwin (ACM Great Lakes Symposium on VLSI, 2000)

Energy-Aware Instruction Scheduling. - Amisha Parikh; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (HiPC, 2000)

Hardware/Software Co-design for Real-Time Physical Modeling. - Benjamin Bishop; Thomas P. Kelliher; Mary Jane Irwin (IEEE International Conference on Multimedia and Expo (III), 2000)

Energy-driven integrated hardware-software optimizations using SimplePower. - Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Hyun Suk Kim; Wu Ye (ISCA, 2000)

Memory system energy (poster session): influence of hardware-software optimizations. - G. Esakkimuthu; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ISLPED, 2000)

Experimental Evaluation of Energy Behavior of Iteration Space Tiling. - Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Hyun Suk Kim (LCPC, 2000)

Towards Energy-Aware Iteration Space Tiling. - Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Hyun Suk Kim (LCTES, 2000)

A Holistic Approach to System Level Energy Optimization. - Mary Jane Irwin; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Anand Sivasubramaniam (PATMOS, 2000)

Editorial. - Mary Jane Irwin (ACM Trans. Design Autom. Electr. Syst., 2000)

The design of the MGAP-2: a micro-grained massively parallel array. - Eric Gayles; Thomas P. Kelliher; Robert Michael Owens; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Energy-efficient instruction cache using page-based placement. - Hyun Suk Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (CASES, 2001)

Dynamic Management of Scratch-Pad Memory Space. - Mahmut T. Kandemir; J. Ramanujam; Mary Jane Irwin; Narayanan Vijaykrishnan; Ismail Kadayif; Amisha Parikh (DAC, 2001)

DRAM Energy Management Using Software and Hardware Directed Power Mode Control. - Victor Delaluz; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Anand Sivasubramaniam; Mary Jane Irwin (HPCA, 2001)

A Framework for Energy Estimation of VLIW Architecture. - Hyun Suk Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ICCD, 2001)

Use of Local Memory for Efficient Java Execution. - Samarjeet Singh Tomar; Hyun Suk Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ICCD, 2001)

Influence of Array Allocation Mechanisms on Memory System Energy. - R. Athavale; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS, 2001)

Power-aware partitioned cache architectures. - Soontae Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Anand Sivasubramaniam; Mary Jane Irwin; E. Geethanjali (ISLPED, 2001)

Energy Behavior of Java Applications from the Memory Perspective. - Narayanan Vijaykrishnan; Mahmut T. Kandemir; Soontae Kim; Samarjeet Singh Tomar; Anand Sivasubramaniam; Mary Jane Irwin (Java Virtual Machine Research and Technology Symposium, 2001)

Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. - Wei Zhang 002; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; David Duarte; Yuh-Fang Tsai (MICRO, 2001)

SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. - Pradeep K. Khosla; Herman Schmit; Mary Jane Irwin; Narayanan Vijaykrishnan; Tom Cain; Steven P. Levitan; Dave Landis (MSE, 2001)

vEC: virtual energy counters. - Ismail Kadayif; T. Chinoda; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Anand Sivasubramaniam (PASTE, 2001)

Morphable Cache Architectures: Potential Benefits. - Ismail Kadayif; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Jagannathan Ramanujam (OM@PLDI, 2001)

Analyzing energy behavior of spatial access methods for memory-resident data. - Ning An 001; Anand Sivasubramaniam; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Sudhanva Gurumurthi (VLDB, 2001)

Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. - David Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin; Mahmut T. Kandemir (VLSI Design, 2001)

Hardware and Software Techniques for Controlling DRAM Power Modes. - Victor Delaluz; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Anand Sivasubramaniam; Mary Jane Irwin (IEEE Trans. Computers, 2001)

Architecture-level power estimation and design experiments. - Rita Yu Chen; Mary Jane Irwin; Raminder Singh Bajwa (ACM Trans. Design Autom. Electr. Syst., 2001)

Design considerations for databus charge recovery. - Benjamin Bishop; V. Lyuboslavsky; Narayanan Vijaykrishnan; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Influence of compiler optimizations on system power. - Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Wu Ye (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Investigating Memory System Energy Behavior Using Software and Hardware Optimizations. - G. Esakkimuthu; Hyun Suk Kim; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2001)

Leakage Energy Management in Cache Hierarchies. - Lin Li 002; Ismail Kadayif; Yuh-Fang Tsai; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Anand Sivasubramaniam (IEEE PACT, 2002)

Energy savings through compression in embedded Java environments. - Guangyu Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (CODES, 2002)

Scheduler-based DRAM energy management. - Victor Delaluz; Anand Sivasubramaniam; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (DAC, 2002)

A Complete Phase-Locked Loop Power Consumption Model. - David Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin (DATE, 2002)

Power-Efficient Trace Caches. - Jie S. Hu; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (DATE, 2002)

EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. - Ismail Kadayif; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Anand Sivasubramaniam (DATE, 2002)

Tuning Garbage Collection in an Embedded Java Environment. - Guangyu Chen; R. Shetty; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Mario Wolczko (HPCA, 2002)

Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. - Sudhanva Gurumurthi; Anand Sivasubramaniam; Mary Jane Irwin; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Tao Li 006; Lizy Kurian John (HPCA, 2002)

Power efficient adaptive M-QAM design using adaptive pipelined analog-to-digital converter. - Byung-Tae Kang; Vijaykrishnan Narayanan; Mary Jane Irwin; Rajarathnam Chandramouli (ICASSP, 2002)

Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. - David Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin; Hyun Suk Kim; Grant McFarland (ICCD, 2002)

Designing Energy-Efficient Software. - Anand Sivasubramaniam; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (IPDPS, 2002)

Impact of Technology Scaling in the Clock System Power. - David Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin (ISVLSI, 2002)

Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. - Ismail Kadayif; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ISVLSI, 2002)

Adaptive Garbage Collection for Battery-Operated Environments. - Guangyu Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Mario Wolczko (Java Virtual Machine Research and Technology Symposium, 2002)

Compiler-directed cache polymorphism. - Jie S. Hu; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Hendra Saputra; Wei Zhang 002 (LCTES-SCOPES, 2002)

Energy-conscious compilation based on voltage scaling. - Hendra Saputra; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Jie S. Hu; Chung-Hsing Hsu; Ulrich Kremer (LCTES-SCOPES, 2002)

Compiler-directed instruction cache leakage optimization. - Wei Zhang 002; Jie S. Hu; Vijay Degalahal; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (MICRO, 2002)

Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. - Victor Delaluz; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Anand Sivasubramaniam; Ibrahim Kolcu (ASP-DAC/VLSI Design, 2002)

Evaluating Run-Time Techniques for Leakage Power Reduction. - David Duarte; Yuh-Fang Tsai; Narayanan Vijaykrishnan; Mary Jane Irwin (ASP-DAC/VLSI Design, 2002)

Using Memory Compression for Energy Reduction in an Embedded Java System. - Guangyu Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (J. Circuits Syst. Comput., 2002)

Tuning garbage collection for reducing memory system energy in an embedded java environment. - Guangyu Chen; R. Shetty; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Mario Wolczko (ACM Trans. Embed. Comput. Syst., 2002)

A clock power model to evaluate impact of architectural and technology optimizations. - D. E. Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Energy-performance trade-offs for spatial access methods on memory-resident data. - Ning An 001; Sudhanva Gurumurthi; Anand Sivasubramaniam; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (VLDB J., 2002)

Exploiting bank locality in multi-bank memories. - Guilin Chen; Mahmut T. Kandemir; Hendra Saputra; Mary Jane Irwin (CASES, 2003)

Performance, energy, and reliability tradeoffs in replicating hot cache lines. - Wei Zhang 002; Mahmut T. Kandemir; Anand Sivasubramaniam; Mary Jane Irwin (CASES, 2003)

Address Register Assignment for Reducing Code Size. - Mahmut T. Kandemir; Mary Jane Irwin; Guilin Chen; J. Ramanujam (CC, 2003)

Tracking object life cycle for leakage energy optimization. - Guangyu Chen; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Mario Wolczko (CODES+ISSS, 2003)

VL-CDRAM: variable line sized cached DRAMs. - Ananth Hegde; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (CODES+ISSS, 2003)

Implications of technology scaling on leakage reduction techniques. - Yuh-Fang Tsai; David Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin (DAC, 2003)

Masking the Energy Behavior of DES Encryption. - Hendra Saputra; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Richard R. Brooks; Soontae Kim; Wei Zhang 002 (DATE, 2003)

Compiler Support for Reducing Leakage Energy Consumption. - Wei Zhang 002; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Vivek De (DATE, 2003)

CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. - Lin Li 002; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Ismail Kadayif (DSD, 2003)

Adapative Error Protection for Energy Efficiency. - Lin Li 002; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ICCAD, 2003)

Reducing dTLB Energy Through Dynamic Resizing. - Victor Delaluz; Mahmut T. Kandemir; Anand Sivasubramaniam; Mary Jane Irwin; Narayanan Vijaykrishnan (ICCD, 2003)

Computation and transmission energy modeling through profiling for MPEG4 video transmission. - Amol Bhatkar; Rajarathnam Chandramouli; Narayanan Vijaykrishnan; Mary Jane Irwin (ICME, 2003)

Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. - Guilin Chen; Byung-Tae Kang; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Rajarathnam Chandramouli (IPDPS, 2003)

Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. - Sudhanva Gurumurthi; Ning An 001; Anand Sivasubramaniam; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS, 2003)

Exploiting program hotspots and code sequentiality for instruction cache leakage management. - Jie S. Hu; A. Nadgir; Narayanan Vijaykrishnan; Mary Jane Irwin; Mahmut T. Kandemir (ISLPED, 2003)

On load latency in low-power caches. - Soontae Kim; Narayanan Vijaykrishnan; Mary Jane Irwin; Lizy Kurian John (ISLPED, 2003)

Estimating influence of data layout optimizations on SDRAM energy consumption. - Hyun Suk Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Erik Brockmeyer; Francky Catthoor; Mary Jane Irwin (ISLPED, 2003)

Energy optimization techniques in cluster interconnects. - Eun Jung Kim 001; Ki Hwan Yum; Greg M. Link; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Mazin S. Yousif; Chita R. Das (ISLPED, 2003)

Interplay of energy and performance for disk arrays running transaction processing workloads. - Sudhanva Gurumurthi; Jianyong Zhang; Anand Sivasubramaniam; Mahmut T. Kandemir; Hubertus Franke; Narayanan Vijaykrishnan; Mary Jane Irwin (ISPASS, 2003)

Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. - Jie S. Hu; Narayanan Vijaykrishnan; Mary Jane Irwin; Mahmut T. Kandemir (ISVLSI, 2003)

Adapting instruction level parallelism for optimizing leakage in VLIW architectures. - Hyun Suk Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (LCTES, 2003)

Heap compression for memory-constrained Java environments. - Guangyu Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Bernd Mathiske; Mario Wolczko (OOPSLA, 2003)

Effect of Power Optimizations on Soft Error Rate. - Vijay Degalahal; Rajaraman Ramanarayanan; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (VLSI-SoC (Selected Papers), 2003)

Analyzing Soft Errors in Leakage Optimized SRAM Design. - Vijay Degalahal; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2003)

Leakage Current: Moore's Law Meets Static Power. - Nam Sung Kim; Todd M. Austin; David T. Blaauw; Trevor N. Mudge; Krisztián Flautner; Jie S. Hu; Mary Jane Irwin; Mahmut T. Kandemir; Narayanan Vijaykrishnan (Computer, 2003)

Power-Aware Designers at Odds with Power Grid Designers? - Mary Jane Irwin (IEEE Des. Test Comput., 2003)

Managing Leakage Energy in Cache Hierarchies. - Lin Li 002; Ismail Kadayif; Yuh-Fang Tsai; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Anand Sivasubramaniam (J. Instr. Level Parallelism, 2003)

Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. - Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Hyun Suk Kim; Wu Ye; David Duarte (IEEE Trans. Computers, 2003)

Partitioned instruction cache architecture for energy efficiency. - Soontae Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Anand Sivasubramaniam; Mary Jane Irwin (ACM Trans. Embed. Comput. Syst., 2003)

Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations. - Ismail Kadayif; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Ibrahim Kolcu (Ultra Low-Power Electronics and Design, 2004)

Analyzing heap error behavior in embedded JVM environments. - Guilin Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Anand Sivasubramaniam; Mary Jane Irwin (CODES+ISSS, 2004)

Data compression for improving SPM behavior. - Ozcan Ozturk 001; Mahmut T. Kandemir; I. Demirkiran; Guangyu Chen; Mary Jane Irwin (DAC, 2004)

Scheduling Reusable Instructions for Power Reduction. - Jie S. Hu; Narayanan Vijaykrishnan; Soontae Kim; Mahmut T. Kandemir; Mary Jane Irwin (DATE, 2004)

A Crosstalk Aware Interconnect with Variable Cycle Transmission. - Lin Li 002; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (DATE, 2004)

Using Data Compression to Increase Energy Savings in Multi-bank Memories. - Mahmut T. Kandemir; Ozcan Ozturk 001; Mary Jane Irwin; Ibrahim Kolcu (Euro-Par, 2004)

Exploring the Possibility of Operating in the Compressed Domain. - Victor De La Luz; Mahmut T. Kandemir; Anand Sivasubramaniam; Mary Jane Irwin (Euro-Par, 2004)

Reducing leakage energy in FPGAs using region-constrained placement. - Aman Gayasen; Yuh-Fang Tsai; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Tim Tuan (FPGA, 2004)

A Dual-VDD Low Power FPGA Architecture. - Aman Gayasen; K. Lee; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Tim Tuan (FPL, 2004)

Tuning data replication for improving behavior of MPSoC applications. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin; Ibrahim Kolcu (ACM Great Lakes Symposium on VLSI, 2004)

Design of a nanosensor array architecture. - Wei Xu; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (ACM Great Lakes Symposium on VLSI, 2004)

Exploring Wakeup-Free Instruction Scheduling. - Jie S. Hu; Narayanan Vijaykrishnan; Mary Jane Irwin (HPCA, 2004)

Efficient VLSI implementation of inverse discrete cosine transform [image coding applications]. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin (ICASSP (5), 2004)

Analyzing software influences on substrate noise: an ADC perspective. - Frank Ghenassia; Narayanan Vijaykrishnan; Mary Jane Irwin (ICCAD, 2004)

Banked scratch-pad memory management for reducing leakage energy consumption. - Mahmut T. Kandemir; Mary Jane Irwin; Guilin Chen; Ibrahim Kolcu (ICCAD, 2004)

Improving soft-error tolerance of FPGA configuration bits. - Suresh Srinivasan; Aman Gayasen; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Yuan Xie 001; Mary Jane Irwin (ICCAD, 2004)

Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. - Wei-Lun Hung; Charles Addo-Quaye; Theo Theocharides; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (ICCD, 2004)

A Parallel Architecture for Secure FPGA Symmetric Encryption. - Eric J. Swankoski; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS, 2004)

Soft error and energy consumption interactions: a data cache perspective. - Lin Li 002; Vijay Degalahal; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ISLPED, 2004)

The Effect of Threshold Voltages on the Soft Error Rate. - Vijay Degalahal; Rajaraman Ramanarayanan; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (ISQED, 2004)

Fault Tolerant Algorithms for Network-On-Chip Interconnect. - Matthew Pirretti; Greg M. Link; Richard R. Brooks; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ISVLSI, 2004)

Evaluating Alternative Implementations for LDPC Decoder Check Node Function. - Theo Theocharides; Greg M. Link; Eric J. Swankoski; Narayanan Vijaykrishnan; Mary Jane Irwin; Herman Schmit (ISVLSI, 2004)

Field level analysis for heap space optimization in embedded java environments. - Guangyu Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ISMM, 2004)

Code protection for resource-constrained embedded devices. - Hendra Saputra; Guangyu Chen; Richard R. Brooks; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (LCTES, 2004)

Power-efficient implementation of turbo decoder in SDR system. - Byung-Tae Kang; Narayanan Vijaykrishnan; Mary Jane Irwin; Theocharis Theocharides (SoCC, 2004)

A generic reconfigurable neural network architecture as a network on chip. - Theocharis Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin; Vamsi Srikantam (SoCC, 2004)

ChipPower: an architecture-level leakage simulator. - Yuh-Fang Tsai; Ananth Hegde Ankadi; Narayanan Vijaykrishnan; Mary Jane Irwin; Theocharis Theocharides (SoCC, 2004)

Designing Leakage Aware Multipliers. - M. DeRenzo; Mary Jane Irwin; Narayanan Vijaykrishnan (VLSI Design, 2004)

An Architecture for Motion Estimation in the Transform Domain. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (VLSI Design, 2004)

Embedded Hardware Face Detection. - Theo Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (VLSI Design, 2004)

Optimizing Leakage Energy Consumption in Cache Bitlines. - Soontae Kim; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (Des. Autom. Embed. Syst., 2004)

Reducing instruction cache energy consumption using a compiler-based strategy. - Wei Zhang 002; Jie S. Hu; Vijay Degalahal; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ACM Trans. Archit. Code Optim., 2004)

A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. - Mahmut T. Kandemir; J. Ramanujam; Mary Jane Irwin; Narayanan Vijaykrishnan; Ismail Kadayif; Amisha Parikh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. - Guangyu Chen; Byung-Tae Kang; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin; Rajarathnam Chandramouli (IEEE Trans. Parallel Distributed Syst., 2004)

Characterization and modeling of run-time techniques for leakage power reduction. - Yuh-Fang Tsai; D. E. Duarte; Narayanan Vijaykrishnan; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Instruction Scheduling for Low Power. - Amisha Parikh; Soontae Kim; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (J. VLSI Signal Process., 2004)

Compiler-directed selective data protection against soft errors. - G. Chen; Mahmut T. Kandemir; Mary Jane Irwin; Gokhan Memik (ASP-DAC, 2005)

Customized on-chip memories for embedded chip multiprocessors. - Ozcan Ozturk 001; Mahmut T. Kandemir; G. Chen; Mary Jane Irwin; Mustafa Karaköy (ASP-DAC, 2005)

Designing reliable circuit in the presence of soft errors. - Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (ASP-DAC, 2005)

Compiler-directed proactive power management for networks. - Feihui Li; Guangyu Chen; Mahmut T. Kandemir; Mary Jane Irwin (CASES, 2005)

Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin (CODES+ISSS, 2005)

Exploring technology alternatives for nano-scale FPGA interconnects. - Aman Gayasen; Narayanan Vijaykrishnan; Mary Jane Irwin (DAC, 2005)

Compiler-Directed Instruction Duplication for Soft Error Detection. - Jie S. Hu; Feihui Li; Vijay Degalahal; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (DATE, 2005)

Thermal-Aware Task Allocation and Scheduling for Embedded Systems. - Wei-Lun Hung; Yuan Xie 001; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (DATE, 2005)

BB-GC: Basic-Block Level Garbage Collection. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin (DATE, 2005)

Leakage-Aware Interconnect for On-Chip Network. - Yuh-Fang Tsai; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (DATE, 2005)

Using data compression in an MPSoC architecture for improving performance. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin (ACM Great Lakes Symposium on VLSI, 2005)

Three-Dimensional Cache Design Exploration Using 3DCacti. - Yuh-Fang Tsai; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (ICCD, 2005)

Exploiting Barriers to Optimize Power Consumption of CMPs. - Chun Liu 001; Anand Sivasubramaniam; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS, 2005)

Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs. - Padma Raghavan; Mary Jane Irwin; Lois C. McInnes; Boyana Norris (IPDPS, 2005)

Optimizing sensor movement planning for energy efficiency. - Guiling Wang 001; Mary Jane Irwin; Piotr Berman; Haoying Fu; Thomas F. La Porta (ISLPED, 2005)

Thermal-Aware Floorplanning Using Genetic Algorithms. - Wei-Lun Hung; Yuan Xie 001; Narayanan Vijaykrishnan; Charles Addo-Quaye; Theo Theocharides; Mary Jane Irwin (ISQED, 2005)

High Performance Array Processor for Video Decoding. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin (ISVLSI, 2005)

On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. - Özcan Özturk 001; Mahmut T. Kandemir; Mary Jane Irwin; Suleyman Tosun (SoCC, 2005)

Exploiting frequent field values in java objects for reducing heap memory requirements. - Guangyu Chen; Mahmut T. Kandemir; Mary Jane Irwin (VEE, 2005)

A Nanosensor Array-Based VLSI Gas Discriminator. - Kevin M. Irick; Wei Xu; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2005)

Implementing LDPC Decoding on Network-on-Chip. - Theo Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2005)

Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. - Yuh-Fang Tsai; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (VLSI Design, 2005)

Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. - Theocharis Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin (Adv. Comput., 2005)

Analysis of Error Recovery Schemes for Networks on Chips. - Srinivasan Murali; Theo Theocharides; Narayanan Vijaykrishnan; Mary Jane Irwin; Luca Benini; Giovanni De Micheli (IEEE Des. Test Comput., 2005)

Symmetric encryption in reconfigurable and custom hardware. - Eric J. Swankoski; Narayanan Vijaykrishnan; Richard R. Brooks; Mahmut T. Kandemir; Mary Jane Irwin (Int. J. Embed. Syst., 2005)

Editorial. - Mary Jane Irwin; Narayanan Vijaykrishnan (ACM J. Emerg. Technol. Comput. Syst., 2005)

An integer linear programming-based tool for wireless sensor networks. - Ismail Kadayif; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (J. Parallel Distributed Comput., 2005)

A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. - Eun Jung Kim 001; Greg M. Link; Ki Hwan Yum; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Chita R. Das (IEEE Trans. Computers, 2005)

Analyzing data reuse for cache reconfiguration. - Jie S. Hu; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ACM Trans. Embed. Comput. Syst., 2005)

Compiler-directed high-level energy estimation and optimization. - Ismail Kadayif; Mahmut T. Kandemir; Guilin Chen; Narayanan Vijaykrishnan; Mary Jane Irwin; Anand Sivasubramaniam (ACM Trans. Embed. Comput. Syst., 2005)

Soft errors issues in low-power caches. - Vijay Degalahal; Lin Li 002; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Compiler-guided leakage optimization for banked scratch-pad memories. - Mahmut T. Kandemir; Mary Jane Irwin; Guangyu Chen; Ibrahim Kolcu (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Object duplication for improving reliability. - Guilin Chen; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ASP-DAC, 2006)

Activity clustering for leakage management in SPMs. - Mahmut T. Kandemir; Guangyu Chen; Feihui Li; Mary Jane Irwin; Ibrahim Kolcu (DATE, 2006)

Priority scheduling in digital microfluidics-based biochips. - Andrew J. Ricketts; Kevin M. Irick; Narayanan Vijaykrishnan; Mary Jane Irwin (DATE, 2006)

On-chip bus thermal analysis and optimization. - Feng Wang 004; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (DATE, 2006)

Characterizing the Performance and Energy Attributes of Scientific Simulations. - Sayaka Akioka; Konrad Malkowski; Padma Raghavan; Mary Jane Irwin; Lois C. McInnes; Boyana Norris (International Conference on Computational Science (1), 2006)

Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin; Suleyman Tosun (ICPADS (1), 2006)

Enhancing L2 organization for CMPs with a center cell. - Chun Liu 001; Anand Sivasubramaniam; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS, 2006)

On improving performance and energy profiles of sparse scientific applications. - Konrad Malkowski; Ingyu Lee; Padma Raghavan; Mary Jane Irwin (IPDPS, 2006)

Conjugate gradient sparse solvers: performance-power characteristics. - Konrad Malkowski; Ingyu Lee; Padma Raghavan; Mary Jane Irwin (IPDPS, 2006)

Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. - Wei-Lun Hung; Greg M. Link; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (ISQED, 2006)

A Parallel Architecture for Hardware Face Detection. - Theo Theocharides; Narayanan Vijaykrishnan; Mary Jane Irwin (ISVLSI, 2006)

Compiler-directed thermal management for VLIW functional units. - Madhu Mutyam; Feihui Li; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (LCTES, 2006)

Reducing NoC energy consumption through compiler-directed channel voltage scaling. - Guangyu Chen; Feihui Li; Mahmut T. Kandemir; Mary Jane Irwin (PLDI, 2006)

Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. - S. Conner; Greg M. Link; S. Tobita; Mary Jane Irwin; Padma Raghavan (SC, 2006)

Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. - Konrad Malkowski; Padma Raghavan; Mary Jane Irwin (SC, 2006)

SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. - R. Rajaraman; Jungsub Kim; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (VLSI Design, 2006)

Plagiarism on the rise. - Ronald F. Boisvert; Mary Jane Irwin (Commun. ACM, 2006)

Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin (IEEE Trans. Circuits Syst. Video Technol., 2006)

An efficient architecture for motion estimation and compensation in the transform domain. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (IEEE Trans. Circuits Syst. Video Technol., 2006)

Reducing code size through address register assignment. - Guilin Chen; Mahmut T. Kandemir; Mary Jane Irwin; J. Ramanujam (ACM Trans. Embed. Comput. Syst., 2006)

Reducing dynamic and leakage energy in VLIW architectures. - Wei Zhang 002; Yuh-Fang Tsai; David Duarte; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ACM Trans. Embed. Comput. Syst., 2006)

Block-based frequency scalable technique for efficient hierarchical coding. - Jooheung Lee; Narayanan Vijaykrishnan; Mary Jane Irwin; Rajarathnam Chandramouli (IEEE Trans. Signal Process., 2006)

Ring Prediction for Non-Uniform Cache Architectures. - Sayaka Akioka; Feihui Li; Mahmut T. Kandemir; Padma Raghavan; Mary Jane Irwin (PACT, 2007)

Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. - S. Conner; Sayaka Akioka; Mary Jane Irwin; Padma Raghavan (IPDPS, 2007)

Load Miss Prediction - Exploiting Power Performance Trade-offs. - Konrad Malkowski; Greg M. Link; Padma Raghavan; Mary Jane Irwin (IPDPS, 2007)

Memory Optimizations For Fast Power-Aware Sparse Computations. - Konrad Malkowski; Padma Raghavan; Mary Jane Irwin (IPDPS, 2007)

Phase-aware adaptive hardware selection for power-efficient scientific computations. - Konrad Malkowski; Padma Raghavan; Mahmut T. Kandemir; Mary Jane Irwin (ISLPED, 2007)

Variation Analysis of CAM Cells. - Amol Mupid; Madhu Mutyam; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (ISQED, 2007)

Variation Impact on SER of Combinational Circuits. - Krishnan Ramakrishnan; R. Rajaraman; Sivaprakasam Suresh; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin (ISQED, 2007)

Investigating Simple Low Latency Reliable Multiported Register Files. - Andrew J. Ricketts; Madhu Mutyam; Narayanan Vijaykrishnan; Mary Jane Irwin (ISVLSI, 2007)

Impact of NBTI on FPGAs. - Krishnan Ramakrishnan; Sivaprakasam Suresh; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2007)

Architecting Microprocessor Components in 3D Design Space. - Balaji Vaidyanathan; Wei-Lun Hung; Feng Wang 004; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2007)

Evolving the ACM journal distribution program. - Ronald F. Boisvert; Mary Jane Irwin; Holly E. Rushmeier (Commun. ACM, 2007)

Optimising power efficiency in trace cache fetch unit. - Jie S. Hu; Narayanan Vijaykrishnan; Mary Jane Irwin; Mahmut T. Kandemir (IET Comput. Digit. Tech., 2007)

On-chip bus thermal analysis and optimisation. - Feng Wang 004; Michael DeBole; Xiaoxia Wu; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (IET Comput. Digit. Tech., 2007)

Reducing non-deterministic loads in low-power caches via early cache set resolution. - Soontae Kim; Narayanan Vijaykrishnan; Mary Jane Irwin (Microprocess. Microsystems, 2007)

Reliability-aware Co-synthesis for Embedded Systems. - Yuan Xie 001; Lin Li 002; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (J. VLSI Signal Process., 2007)

Adaptive set pinning: managing shared caches in chip multiprocessors. - Shekhar Srikantaiah; Mahmut T. Kandemir; Mary Jane Irwin (ASPLOS, 2008)

Analysis and solutions to issue queue process variation. - Niranjan Soundararajan; Aditya Yanamandra; Chrysostomos Nicopoulos; Narayanan Vijaykrishnan; Anand Sivasubramaniam; Mary Jane Irwin (DSN, 2008)

A low-power phase change memory based hybrid cache architecture. - Prasanth Mangalagiri; Karthik Sarpatwari; Aditya Yanamandra; Vijaykrishnan Narayanan; Yuan Xie 001; Mary Jane Irwin; Osama Awadel Karim (ACM Great Lakes Symposium on VLSI, 2008)

Integrated code and data placement in two-dimensional mesh based chip multiprocessors. - Taylan Yemliha; Shekhar Srikantaiah; Mahmut T. Kandemir; Mustafa Karaköy; Mary Jane Irwin (ICCAD, 2008)

Ring data location prediction scheme for Non-Uniform Cache Architectures. - Sayaka Akioka; Feihui Li; Konrad Malkowski; Padma Raghavan; Mahmut T. Kandemir; Mary Jane Irwin (ICCD, 2008)

A helper thread based EDP reduction scheme for adapting application execution in CMPs. - Yang Ding; Mahmut T. Kandemir; Padma Raghavan; Mary Jane Irwin (IPDPS, 2008)

Managing power, performance and reliability trade-offs. - Padma Raghavan; Mahmut T. Kandemir; Mary Jane Irwin; Konrad Malkowski (IPDPS, 2008)

Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. - Aditya Yanamandra; Bryan Cover; Padma Raghavan; Mary Jane Irwin; Mahmut T. Kandemir (IPDPS, 2008)

Hierarchical Soft Error Estimation Tool (HSEET). - Krishnan Ramakrishnan; R. Rajaraman; Narayanan Vijaykrishnan; Yuan Xie 001; Mary Jane Irwin; Kenan Unlu (ISQED, 2008)

A novel migration-based NUCA design for chip multiprocessors. - Mahmut T. Kandemir; Feihui Li; Mary Jane Irwin; Seung Woo Son 001 (SC, 2008)

Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. - Feihui Li; Mahmut T. Kandemir; Mary Jane Irwin (SIGMETRICS, 2008)

Toward Increasing FPGA Lifetime. - Suresh Srinivasan; Krishnan Ramakrishnan; Prasanth Mangalagiri; Yuan Xie 001; Vijaykrishnan Narayanan; Mary Jane Irwin; Karthik Sarpatwari (IEEE Trans. Dependable Secur. Comput., 2008)

Design Space Exploration for 3-D Cache. - Yuh-Fang Tsai; Feng Wang 004; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Arithmetic unit design using 180nm TSV-based 3D stacking technology. - Jin Ouyang; Guangyu Sun 003; Yibo Chen; Lian Duan; Tao Zhang 032; Yuan Xie 001; Mary Jane Irwin (3DIC, 2009)

Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. - Yang Ding; Mahmut T. Kandemir; Mary Jane Irwin; Padma Raghavan (HiPEAC, 2009)

In-Network Caching for Chip Multiprocessors. - Aditya Yanamandra; Mary Jane Irwin; Vijaykrishnan Narayanan; Mahmut T. Kandemir; Sri Hari Krishna Narayanan (HiPEAC, 2009)

Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. - Yuan Xie 001; Soumya Eachempati; Aditya Yanamandra; Vijaykrishnan Narayanan; Mary Jane Irwin (NANOARCH, 2009)

Adapting application execution in CMPs using helper threads. - Yang Ding; Mahmut T. Kandemir; Padma Raghavan; Mary Jane Irwin (J. Parallel Distributed Comput., 2009)

Process-Variation-Aware Adaptive Cache Architecture and Management. - Madhu Mutyam; Feng Wang 004; Krishnan Ramakrishnan; Vijaykrishnan Narayanan; Mahmut T. Kandemir; Yuan Xie 001; Mary Jane Irwin (IEEE Trans. Computers, 2009)

Using Data Compression for Increasing Memory System Utilization. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. - Rajaraman Ramanarayanan; Vijay Degalahal; Krishnan Ramakrishnan; Jungsub Kim; Vijaykrishnan Narayanan; Yuan Xie 001; Mary Jane Irwin; Kenan Unlu (IEEE Trans. Dependable Secur. Comput., 2009)

Compiler-assisted soft error detection under performance and energy constraints in embedded systems. - Jie S. Hu; Feihui Li; Vijay Degalahal; Mahmut T. Kandemir; Narayanan Vijaykrishnan; Mary Jane Irwin (ACM Trans. Embed. Comput. Syst., 2009)

Optimizing power and performance for reliable on-chip networks. - Aditya Yanamandra; Soumya Eachempati; Niranjan Soundararajan; Vijaykrishnan Narayanan; Mary Jane Irwin; Ramakrishnan Krishnan (ASP-DAC, 2010)

Dynamic core partitioning for energy efficiency. - Yang Ding; Mahmut T. Kandemir; Mary Jane Irwin; Padma Raghavan (IPDPS Workshops, 2010)

T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs. - Konrad Malkowski; Padma Raghavan; Mahmut T. Kandemir; Mary Jane Irwin (IPDPS Workshops, 2010)

Shared caches in multicores: the good, the bad, and the ugly. - Mary Jane Irwin (ISCA, 2010)

Compiler directed network-on-chip reliability enhancement for chip multiprocessors. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin; Sri Hari Krishna Narayanan (LCTES, 2010)

Cache topology aware computation mapping for multicores. - Mahmut T. Kandemir; Taylan Yemliha; Sai Prashanth Muralidhara; Shekhar Srikantaiah; Mary Jane Irwin; Yuanrui Zhang (PLDI, 2010)

Technology scaling redirects main memories: technical perspective. - Mary Jane Irwin (Commun. ACM, 2010)

On-chip memory space partitioning for chip multiprocessors using polyhedral algebra. - Ozcan Ozturk 001; Mahmut T. Kandemir; Mary Jane Irwin (IET Comput. Digit. Tech., 2010)

On the Effects of Process Variation in Network-on-Chip Architectures. - Chrysostomos Nicopoulos; Suresh Srinivasan; Aditya Yanamandra; Dongkook Park; Vijaykrishnan Narayanan; Chita R. Das; Mary Jane Irwin (IEEE Trans. Dependable Secur. Comput., 2010)

Total Power Optimization for Combinational Logic Using Genetic Algorithms. - Wei-Lun Hung; Yuan Xie 001; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (J. Signal Process. Syst., 2010)

MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. - Shekhar Srikantaiah; Emre Kultursay; Tao Zhang 032; Mahmut T. Kandemir; Mary Jane Irwin; Yuan Xie 001 (HPCA, 2011)

Exploring heterogeneous NoC design space. - Hui Zhao 013; Mahmut T. Kandemir; Wei Ding 008; Mary Jane Irwin (ICCAD, 2011)

Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs. - Hui Zhao 013; Mahmut T. Kandemir; Mary Jane Irwin (ISQED, 2011)

Optimizing sensor movement planning for energy efficiency. - Guiling Wang 001; Mary Jane Irwin; Haoying Fu; Piotr Berman; Wensheng Zhang 001; Tom La Porta (ACM Trans. Sens. Networks, 2011)

Courteous cache sharing: being nice to others in capacity management. - Akbar Sharifi; Shekhar Srikantaiah; Mahmut T. Kandemir; Mary Jane Irwin (DAC, 2012)

A hybrid NoC design for cache coherence optimization for chip multiprocessors. - Hui Zhao 013; Ohyoung Jang; Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Mary Jane Irwin (DAC, 2012)

An FPGA-based accelerator for cortical object classification. - Mi Sun Park; Srinidhi Kestur; Jagdish Sabarad; Vijaykrishnan Narayanan; Mary Jane Irwin (DATE, 2012)

Ultra Low Power Circuit Design Using Tunnel FETs. - Ravindhiran Mukundrajan; Matthew Cotter; Vinay Saripalli; Mary Jane Irwin; Suman Datta; Vijaykrishnan Narayanan (ISVLSI, 2012)

REEact: a customizable virtual execution manager for multicore platforms. - Wei Wang 054; Tanima Dey; Ryan W. Moore; Mahmut Aktasoglu; Bruce R. Childers; Jack W. Davidson; Mary Jane Irwin; Mahmut T. Kandemir; Mary Lou Soffa (VEE, 2012)

Reshaping cache misses to improve row-buffer locality in multicore systems. - Wei Ding 008; Jun Liu 008; Mahmut T. Kandemir; Mary Jane Irwin (PACT, 2013)

Design of energy-efficient circuits and systems using tunnel field effect transistors. - Ravindhiran Mukundrajan; Matthew Cotter; Sungmin Bae; Vinay Saripalli; Mary Jane Irwin; Suman Datta; Vijaykrishnan Narayanan (IET Circuits Devices Syst., 2013)

EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. - Hsiang-Yun Cheng; Matthew Poremba; Narges Shahidi; Ivan Stalev; Mary Jane Irwin; Mahmut T. Kandemir; Jack Sampson; Yuan Xie 001 (ISLPED, 2014)

TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability. - Hui Zhao 013; Mahmut T. Kandemir; Mary Jane Irwin (Conf. Computing Frontiers, 2015)

Core vs. uncore: the heart of darkness. - Hsiang-Yun Cheng; Jia Zhan; Jishen Zhao; Yuan Xie 001; Jack Sampson; Mary Jane Irwin (DAC, 2015)

Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. - Mi Sun Park; Omesh Tickoo; Vijaykrishnan Narayanan; Mary Jane Irwin; Ravi Iyer 001 (DATE, 2015)

EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. - Hsiang-Yun Cheng; Matt Poremba; Narges Shahidi; Ivan Stalev; Mary Jane Irwin; Mahmut T. Kandemir; Jack Sampson; Yuan Xie 001 (ACM Trans. Archit. Code Optim., 2015)

Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference. - Hsiang-Yun Cheng; Mary Jane Irwin; Yuan Xie 001 (ACM Trans. Design Autom. Electr. Syst., 2015)

LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. - Hsiang-Yun Cheng; Jishen Zhao; Jack Sampson; Mary Jane Irwin; Aamer Jaleel; Yu Lu; Yuan Xie 001 (ISCA, 2016)

Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell. - Meng-Fan Chang; Ching-Hao Chuang; Yen-Ning Chiang; Shyh-Shyuan Sheu; Chia-Chen Kuo; Hsiang-Yun Cheng; John Sampson; Mary Jane Irwin (ISCAS, 2016)

21st Century Computer Architecture. - Mark D. Hill; Sarita V. Adve; Luis Ceze; Mary Jane Irwin; David R. Kaeli; Margaret Martonosi; Josep Torrellas; Thomas F. Wenisch; David A. Wood 001; Katherine A. Yelick (CoRR, 2016)

Steven P. Levitan (1950-2016). - Mary Jane Irwin; Soha Hassoun (IEEE Des. Test, 2016)