9dB NF and +11dBm OIP3 CMOS Single Conversion Front-End for a Satellite Low-Noise Block Down-Converter. - Takeshi Mitsunaka; Yusuke Kishino; Masafumi Yamanoue; Kunihiko Iizuka; Minoru Fujishima (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

8-GHz Locking Range and 0.4-pJ Low-Energy Differential Dual-Modulus 10/11 Prescaler. - Takeshi Mitsunaka; Masafumi Yamanoue; Kunihiko Iizuka; Minoru Fujishima (IEICE Trans. Electron., 2014)

A 24-bit multi-functional sensor analog front end employing low noise biasing technique with 8.2nV/√Hz input referred noise. - Masahiko Maruyama; Shigenari Taguchi; Masafumi Yamanoue; Kunihiko Iizuka (A-SSCC, 2015)

An Analog Front-End for a Multifunction Sensor Employing a Weak-Inversion Biasing Technique With 26 nVrms, 25 aCrms, and 19 fArms Input-Referred Noise. - Masahiko Maruyama; Shigenari Taguchi; Masafumi Yamanoue; Kunihiko Iizuka (IEEE J. Solid State Circuits, 2016)