A 45nm single-chip application-and-baseband processor using an intermittent operation technique. - Motoyasu Shirasaki; Yusaku Miyazaki; Masahiro Hoshaku; Hiroo Yamamoto; Sachio Ogawa; Takuya Arimura; Hiroshi Hirai; Yasuo Iizuka; Tsutomu Sekibe; Yoichi Nishida; Toshiyuki Ishioka; Junji Michiyama (ISSCC, 2009)

A 12.1 TOPS/W Mixed-precision Quantized Deep Convolutional Neural Network Accelerator for Low Power on Edge / Endpoint Device. - Takanori Isono; Makoto Yamakura; Satoshi Shimaya; Isao Kawamoto; Nobuhiro Tsuboi; Masaaki Mineo; Wataru Nakajima; Kenichi Ishida; Shin Sasaki; Toshio Higuchi; Masahiro Hoshaku; Daisuke Murakami; et al. (A-SSCC, 2020)