0.13 μm CMOS Cartesian loop transmitter IC with fast calibration and switching scheme from opened to closed loop. - Shoji Otaka; Masahiro Hosoya; Hiroaki Ishihara; Toru Hashimoto; Yuta Araki (ESSCIRC, 2008)

A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface. - Hiroshi Yoshida; Takehiko Toyoda; T. Yasuda; Yosuke Ogasawara; M. Ishii; T. Murasaki; Gaku Takemura; Masaomi Iwanaga; T. Takida; Yuta Araki; T. Hashimoto; K. Sami; et al. (ESSCIRC, 2008)

A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range. - Masahiro Hosoya; Toshiya Mitomo; Osamu Watanabe 003 (ESSCIRC, 2010)

A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization. - Hiroaki Ishihara; Masahiro Hosoya; Shoji Otaka; Osamu Watanabe 003 (ISSCC, 2010)

A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization. - Hiroaki Ishihara; Masahiro Hosoya; Shoji Otaka; Osamu Watanabe 003 (IEEE J. Solid State Circuits, 2010)

A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller. - Kohei Onizuka; Hiroaki Ishihara; Masahiro Hosoya; Shigehito Saigusa; Osamu Watanabe 003; Shoji Otaka (CICC, 2011)

A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (ISSCC, 2012)

A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2012)

A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion. - Kohei Onizuka; Hiroaki Ishihara; Masahiro Hosoya; Shigehito Saigusa; Osamu Watanabe 003; Shoji Otaka (IEEE J. Solid State Circuits, 2012)

A 3-GS/s 5-bit Flash ADC with wideband input buffer amplifier. - Junya Matsuno; Masahiro Hosoya; Masanori Furuta; Tetsuro Itakura (VLSI-DAT, 2013)

Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2013)

20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. - Shigehito Saigusa; Toshiya Mitomo; Hidenori Okuni; Masahiro Hosoya; Akihide Sai; Shusuke Kawai; Tong Wang 018; Masanori Furuta; Kei Shiraishi; Koichiro Ban; Seiichiro Horikawa; Tomoya Tandai; et al. (ISSCC, 2014)

A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS. - Masanori Furuta; Hidenori Okuni; Masahiro Hosoya; Akihide Sai; Junya Matsuno; Shigehito Saigusa; Tetsuro Itakura (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)