Resonant Power Supply Noise Reduction by STO Capacitors Fabricated on Interposer. - Toru Nakura; Masahiro Kano; Masamitsu Yoshizawa; Atsunori Hattori; Kunihiro Asada (IEICE Trans. Electron., 2015)

Resonant power supply noise reduction using a triangular active charge injection. - Masahiro Kano; Toru Nakura; Tetsuya Iizuka; Kunihiro Asada (ICECS, 2016)

Analysis and design of a triangular active charge injection for stabilizing resonant power supply noise. - Masahiro Kano; Toru Nakura; Kunihiro Asada (ISQED, 2016)

A triangular active charge injection scheme using a resistive current for resonant power supply noise suppression. - Masahiro Kano; Toru Nakura; Tetsuya Iizuka; Kunihiro Asada (ICECS, 2017)

Triangular Active Charge Injection Method for Resonant Power Supply Noise Reduction. - Masahiro Kano; Toru Nakura; Tetsuya Iizuka; Kunihiro Asada (IEICE Trans. Electron., 2018)

30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology. - Tsutomu Higuchi; Takuyo Kodama; Koji Kato; Ryo Fukuda; Naoya Tokiwa; Mitsuhiro Abe; Teruo Takagiwa; Yuki Shimizu; Junji Musha; Katsuaki Sakurai; Jumpei Sato; Tetsuaki Utsumi; et al. (ISSCC, 2021)

A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm2 bit density with 3.2Gbps interface and 205MB/s program throughput. - Mario Sako; T. Nakajima; Fumihiro Kono; Takeshi Nakano; Masaki Fujiu; Junji Musha; Dai Nakamura; Naoaki Kanagawa; Yutaka Shimizu; Kosuke Yanagidaira; Tetsuaki Utsumi; T. Kawano; et al. (VLSI Technology and Circuits, 2023)

A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os. - Kosuke Yanagidaira; Mario Sako; Yasuhiro Hirashima; Junya Matsuno; Yumi Higashi; Yutaka Shimizu; Akihiro Imamoto; Kazuaki Kawaguchi; Koji Tabata; Takeshi Nakano; Yusuke Ochi; Hiroaki Hoshino; et al. (ISSCC, 2025)