Phase change RAM operated with 1.5-V CMOS as low cost embedded memory. - Kenichi Osada; Takayuki Kawahara; Riichiro Takemura; Naoki Kitai; Norikatsu Takaura; Nozomu Matsuzaki; Kenzo Kurotsuchi; Hiroshi Moriya; Masahiro Moniwa (CICC, 2005)

A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme. - Akira Kotabe; Kenichi Osada; Naoki Kitai; Mio Fujioka; Shiro Kamohara; Masahiro Moniwa; Sadayuki Morita; Yoshikazu Saitoh (IEEE J. Solid State Circuits, 2005)

A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current. - Satoru Hanzawa; Naoki Kitai; Kenichi Osada; Akira Kotabe; Yuichi Matsui; Nozomu Matsuzaki; Norikatsu Takaura; Masahiro Moniwa; Takayuki Kawahara (ISSCC, 2007)