A convenient notation system for organic structure on the basis of connectivity stack. - Hidetsugu Abe; Yoshihiro Kudo; Tohru Yamasaki; Kazuo Tanaka; Masahiro Sasaki; Shin-ichi Sasaki (J. Chem. Inf. Comput. Sci., 1984)

An open-loop full CMOS 103 MHz -61 dB THD S/H circuit. - Khayrollah Hadidi; Masahiro Sasaki; Tadatoshi Watanabe; Daigo Muramatsu; Takashi Matsumoto 001 (CICC, 1998)

A Bayesian MCMC On-line Signature Verification. - Mitsuru Kondo; Daigo Muramatsu; Masahiro Sasaki; Takashi Matsumoto 001 (AVBPA, 2003)

A highly linear fully differential low power CMOS line driver. - Khayrollah Hadidi; Hiroyuki Oshima; Masahiro Sasaki; Takashi Matsumoto 001 (ESSCIRC, 2003)

Nonlinear separation of signature trajectories for on-line personal authentication. - Mitsuru Kondo; Daigo Muramatsu; Masahiro Sasaki; Takashi Matsumoto 001 (ICASSP (2), 2003)

Inferring transmembrane region counts with hydropathy index/charge two dimensional trajectories of stochastic dynamical systems. - Daigo Muramatsu; Sho Hashimoto; T. Tsunashima; Takashi Kaburagi; Masahiro Sasaki; Takashi Matsumoto 001 (NNSP, 2003)

A Low Power Matched Filter for DS-CDMA Based on Analog Signal Processing. - Masahiro Sasaki; Takeyasu Sakai; Takashi Matsumoto 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Transmembrane Region Prediction with Hydropathy Index/Charge Two-Dimensional Trajectories of Stochastic Dynamical Systems. - Takashi Kaburagi; Daigo Muramatsu; Sho Hashimoto; Masahiro Sasaki; Takashi Matsumoto 001 (APBC, 2004)

4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS. - Masahiro Sasaki; Makoto Ikeda; Kunihiro Asada (ICECS, 2006)

A Markov chain Monte Carlo algorithm for bayesian dynamic signature verification. - Daigo Muramatsu; Mitsuru Kondo; Masahiro Sasaki; Satoshi Tachibana; Takashi Matsumoto 001 (IEEE Trans. Inf. Forensics Secur., 2006)

3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS. - Masahiro Sasaki; Makoto Ikeda; Kunihiro Asada (ICECS, 2007)

Static Characteristics of the Digital PWM and/or PFM Controlled Switching DC-DC Converters. - Masahiro Sasaki; Hirofumi Matsuo; Fujio Kurokawa; Yasuhiro Mimura (IEICE Trans. Commun., 2007)

Integer Programming Approaches to the Problem of Network Upgrading. - Toshihide Ibaraki; Toshihide Nomura; Masahiro Sasaki (SAINT, 2008)

A fully integrated shock wave transmitter with an on-chip dipole antenna for pulse beam-formability in 0.18-μm CMOS. - Nguyen Ngoc Mai Khanh; Masahiro Sasaki; Kunihiro Asada (ASP-DAC, 2011)

A 0.18-µm CMOS X-Band Shock Wave Generator with an On-Chip Dipole Antenna and a Digitally Programmable Delay Circuit for Pulse Beam-Formability. - Nguyen Ngoc Mai Khanh; Masahiro Sasaki; Kunihiro Asada (IEICE Trans. Electron., 2011)

A 0.25-µm Si-Ge Fully Integrated Pulse Transmitter with On-Chip Loop Antenna Array towards Beam-Formability for Millimeter-Wave Active Imaging. - Nguyen Ngoc Mai Khanh; Masahiro Sasaki; Kunihiro Asada (IEICE Trans. Electron., 2011)

A 65-nm CMOS Fully Integrated Shock-Wave Antenna Array with On-Chip Jitter and Pulse-Delay Adjustment for Millimeter-Wave Active Imaging Application. - Nguyen Ngoc Mai Khanh; Masahiro Sasaki; Kunihiro Asada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A design-for-test apparatus for measuring on-chip temperature with fine granularity. - James S. Tandon; Masahiro Sasaki; Makoto Ikeda; Kunihiro Asada (ISQED, 2012)

Tiny Two-Stage 1-GHz Time-Difference Amplifier Without Input Time-Difference Limitation and Extreme Points. - Atsushi Mamba; Masahiro Sasaki (ICECS, 2020)