A static RAM chip with on-chip error correction. - Tzi-Dar Chiueh; Rodney M. Goodman; Masahiro Sayano (IEEE J. Solid State Circuits, 1990)

The reliability of semiconductor RAM memories with on-chip error-correction coding. - Rodney M. Goodman; Masahiro Sayano (IEEE Trans. Inf. Theory, 1991)

Phased burst error-correcting array codes. - Rodney M. Goodman; Robert J. McEliece; Masahiro Sayano (IEEE Trans. Inf. Theory, 1993)