A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology. - Chang Hua Siau; Kwang-Ho Kim; Seungpil Lee; Katsuaki Isobe; Noboru Shibata; Kapil Verma; Takuya Ariki; Jason Li 001; Jong Yuh; Anirudh Amarnath; Qui Nguyen; Ohwon Kwon; et al. (ISSCC, 2019)

Crossed Bit Line (CBL) Architecture in 3D Flash Memory CMOS Directly Bonded to Array (CBA) Structure. - Hiroshi Maejima; Katsuaki Isobe; N. Okada; Masaki Unno; T. Hashimoto; Tetsuaki Utsumi; T. Hisada; K. Maruyama; Toshiyuki Kouchi; T. Kotani; Hitoshi Shiga; O. Kwon; et al. (IMW, 2025)