A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell. - Takayuki Ootani; Shigeyuki Hayakawa; Masakazu Kakumu; Akira Aona; Masaaki Kinugawa; Hideki Takeuchi; Kazuhiro Noguchi; Tomoaki Yabe; Katsuhiko Sato; Kenji Maeguchi; Kiyofumi Ochii (IEEE J. Solid State Circuits, 1990)

Substrate noise influence on circuit performance in variable threshold-voltage scheme. - Tadahiro Kuroda; Tetsuya Fujita; Shinji Mita; Toshiaki Mori; Kenji Matsuo; Masakazu Kakumu; Takayasu Sakurai (ISLPED, 1996)

Multiobjective optimization of VLSI interconnect parameters. - M. B. Anand; Hideki Shibata; Masakazu Kakumu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Dynamic Flash Memory with Fast Block Refresh. - Koji Sakui; Masakazu Kakumu; Nozomu Harada (NVMTS, 2022)

Dynamic Flash Memory Operation Experimentally Validated with 65nm SOI Technology. - Koji Sakui; Daniele Garbin; Yoshihisa Iwata; Gautam Gaddemane; Yisuo Li; Yiqun Wan; Ken'ichi Kanazawa; Eyup Can Demir; Iwao Kunishima; Andrea Fantini; Masakazu Kakumu; Christophe Lorant; et al. (IMW, 2025)