An 0.8-μm high-voltage IC using a newly designed 600-V lateral p-channel dual-action device on SOI. - Kiyoto Watabe; Hajime Akiyama; Tomohide Terashima; Masakazu Okada; Shinji Nobuto; Masao Yamawaki; Sotoju Asa (IEEE J. Solid State Circuits, 1998)

A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die. - Shigeki Ohbayashi; Makoto Yabuuchi; Kazushi Kono; Yuji Oda; Susumu Imaoka; Keiichi Usui; Toshiaki Yonezu; Takeshi Iwamoto; Koji Nii; Yasumasa Tsukamoto; Masashi Arakawa; Takahiro Uchida; et al. (ISSCC, 2007)

A Large-Scale, Flip-Flop RAM Imitating a Logic LSI for Fast Development of Process Technology. - Masako Fujii; Koji Nii; Hiroshi Makino; Shigeki Ohbayashi; Motoshige Igarashi; Takeshi Kawamura; Miho Yokota; Nobuhiro Tsuda; Tomoaki Yoshizawa; Toshikazu Tsutsui; Naohiko Takeshita; Naofumi Murata; et al. (IEICE Trans. Electron., 2008)

A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die. - Shigeki Ohbayashi; Makoto Yabuuchi; Kazushi Kono; Yuji Oda; Susumu Imaoka; Keiichi Usui; Toshiaki Yonezu; Takeshi Iwamoto; Koji Nii; Yasumasa Tsukamoto; Masashi Arakawa; Takahiro Uchida; et al. (IEEE J. Solid State Circuits, 2008)

Sensor network system to promote energy conservation realization of energy smart school. - Koichi Kuzume; Masakazu Okada (PerCom Workshops, 2014)

Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors. - Akira Fujimaki; Masamitsu Tanaka; Ryo Kasagi; Katsumi Takagi; Masakazu Okada; Yuhi Hayakawa; Kensuke Takata; Hiroyuki Akaike; Nobuyuki Yoshikawa; Shuichi Nagasawa; Kazuyoshi Takagi; Naofumi Takagi (IEICE Trans. Electron., 2014)

High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology. - Masamitsu Tanaka; Atsushi Kitayama; Masakazu Okada; Tomohito Kouketsu; Takumi Takinami; Masato Ito; Akira Fujimaki (IEICE Trans. Electron., 2014)