The architecture of a vector digital signal processor for video coding. - Toshiyuki Araki; Masaki Toyokura; Masahiro Wakamori; Kunitoshi Aono (ICASSP, 1992)

A video digital signal processor with a vector-pipeline architecture. - Kunitoshi Aono; Masaki Toyokura; Toshiyuki Araki; Akihiko Ohtani; Hisashi Kodama; Kiyoshi Okamoto (IEEE J. Solid State Circuits, 1992)

Video DSP architecture for MPEG2 codec. - Toshiyuki Araki; Masaki Toyokura; Toshihide Akiyama; Hiroshi Takeno; Brent Wilson 001; Kunitoshi Aono (ICASSP (2), 1994)

A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC. - Masaki Toyokura; Hisashi Kodama; Eiji Miyagoshi; Koyoshi Okamoto; Masahiro Gion; Takayuki Minemaru; Akihiko Ohtani; Toshiyuki Araki; Hiroshi Takeno; Toshihide Akiyama; Brent Wilson 001; Kunitoshi Aono (IEEE J. Solid State Circuits, 1994)