Fanout-tree restructuring algorithm for post-placement timing optimization. - T. Aoki; Masami Murakata; Takashi Mitsuhashi; Nobuyuki Goto (ASP-DAC, 1995)

Physical design CAD in deep sub-micron era. - Takashi Mitsuhashi; Masami Murakata; Kenji Yoshida; Takahiro Aoki (EURO-DAC, 1996)

Switching activity analysis for sequential circuits using Boolean approximation method. - Taku Uchino; Fumihiro Minami; Masami Murakata; Takashi Mitsuhashi (ISLPED, 1996)

Layout Driven Re-synthesis for Low Power Consumption LSIs. - Masako Murofushi; Takashi Ishioka; Masami Murakata; Takashi Mitsuhashi (DAC, 1997)

A Clock-Gating Method for Low-Power LSI Design. - Takeshi Kitahara; Fumihiro Minami; Toshiaki Ueda; Kimiyoshi Usami; Seiichi Nishio; Masami Murakata; Takashi Mitsuhashi (ASP-DAC, 1998)

A DRAM module generator with an expandable cell array scheme. - Hideki Takeuchi; Tomoaki Yabe; Shinji Miyano; Takehiko Hojo; Motohiro Enkaku; Masaaki Yamada; Masami Murakata (CICC, 1998)

Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI. - Yukihito Oowaki; Shinichiro Shiratake; Toshihide Fujiyoshi; Mototsugu Hamada; Fumitoshi Hatori; Masami Murakata; Masafumi Takahashi (IEICE Trans. Electron., 2006)

A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling. - Toshihide Fujiyoshi; Shinichiro Shiratake; Shuou Nomura; Tsuyoshi Nishikawa; Yoshiyuki Kitasho; Hideho Arakida; Yuji Okuda; Yoshiro Tsuboi; Mototsugu Hamada; Hiroyuki Hara; Tetsuya Fujita; Fumitoshi Hatori; et al. (IEEE J. Solid State Circuits, 2006)

Experimental assessment of logic circuit performance variability with regular fabrics at 90nm technology node. - Sungdae Choi; Katsuyuki Ikeuchi; Hyunkyung Kim; Kenichi Inagaki; Masami Murakata; Nobuyuki Nishiguchi; Makoto Takamiya; Takayasu Sakurai (ESSCIRC, 2008)

Increasing minimum operating voltage (VDDmin) with number of CMOS logic gates and experimental verification with up to 1Mega-stage ring oscillators. - Taro Niiyama; Piao Zhe; Koichi Ishida; Masami Murakata; Makoto Takamiya; Takayasu Sakurai (ISLPED, 2008)

Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM. - Taro Niiyama; Piao Zhe; Koichi Ishida; Masami Murakata; Makoto Takamiya; Takayasu Sakurai (ISQED, 2008)

Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits. - Tadashi Yasufuku; Taro Niiyama; Piao Zhe; Koichi Ishida; Masami Murakata; Makoto Takamiya; Takayasu Sakurai (IEICE Trans. Electron., 2010)

An Architectural Study for Inference Coprocessor Core at the Edge in IoT Sensing. - Daisuke Watanabe; Yuji Yano; Shintaro Izumi; Hiroshi Kawaguchi 001; Kiyoshi Takeuchi; Toshiro Hiramoto; Shoichi Iwai; Masami Murakata; Masahiko Yoshimoto (AICAS, 2020)