A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure. - Akira Umezawa; Shigeru Atsumi; Masao Kuriyama; Hironori Banba; Ken-ichi Imamiya; Kiyomi Naruke; Seiji Yamada; Etsushi Obi; Masamitsu Oshikiri; Tomoko Suzuki; Sumio Tanaka (IEEE J. Solid State Circuits, 1992)

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation. - Shigeru Atsumi; Masao Kuriyama; Akira Umezawa; Hironori Banba; Kiyomi Naruke; Seiji Yamada; Yoichi Ohshima; Masamitsu Oshikiri; Yohei Hiura; Tomoko Yamane; Kuniyoshi Yoshikawa (IEEE J. Solid State Circuits, 1994)