Circuit technologies for BiCMOS VLSI's as computer elements. - Hideo Maejima; Tadaaki Bandoh; Yoji Nishio; Tadashi Fukushima; Masanori Odaka; Atsuo Hotta (ICCD, 1989)

An 8 ns 256 K BiCMOS RAM. - Nobuo Tamba; Shuuichi Miyaoka; Masanori Odaka; Katsumi Ogiue; Kouichirou Yamada; Takahide Ikeda; Mitsuru Hirao; Hisayuki Higuchi; Hideaki Uchida (IEEE J. Solid State Circuits, 1989)

A 1.5-ns access time, 78- mu m2 memory-cell size, 64-kb ECL-CMOS SRAM. - Kunihiko Yamaguchi; Hiroaki Nambu; Kazuo Kanetani; Youji Idei; Noriyuki Homma; Toshiro Hiramoto; Nobuo Tamba; Kunihiko Watanabe; Masanori Odaka; Takahide Ikeda; Kenichi Ohhata; Yoshiaki Sakurai (IEEE J. Solid State Circuits, 1992)

High-speed sensing techniques for ultrahigh-speed SRAMs. - Hiroaki Nambu; Kazuo Kanetani; Youji Idei; Noriyuki Homma; Kunihiko Yamaguchi; Toshiro Hiramoto; Nobuo Tamba; Masanori Odaka; Kunihiko Watanabe; Takahide Ikeda; Kenichi Ohhata; Yoshiaki Sakurai (IEEE J. Solid State Circuits, 1992)

A 1.5-ns 256-kb BiCMOS SRAM with 60-ps 11-K logic gates. - Nobuo Tamba; Akio Anzai; Kazuhiro Akimoto; Masayuki Ohayashi; Toshiro Hiramoto; Tadanori Kokubu; Sohei Ohmori; Tetsuya Muraya; Atsuyuki Kishimoto; Sousuke Tsuji; Hideki Hayashi; Nadateru Handa; et al. (IEEE J. Solid State Circuits, 1994)

High-speed FPGA-based Design and Implementation of Text Search Processor. - Binh Kieu-Do-Nguyen; Tuan-Kiet Dang; Trong-Thuc Hoang; Katsumi Inoue; Toshinori Usugi; Masanori Odaka; Shuichi Kameyama; Cong-Kha Pham (ICICDT, 2022)