An SoC architecture and its design methodology using unifunctional heterogeneous processor array. - Yoichi Yuyama; Masao Aramoto; Kazutoshi Kobayashi; Hidetoshi Onodera (ASP-DAC, 2004)

RTL/ISS co-modeling methodology for embedded processor using SystemC. - Yoichi Yuyama; Masao Aramoto; Kazutoshi Kobayashi; Hidetoshi Onodera (ISCAS (5), 2004)

A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing. - Kazutoshi Kobayashi; Masao Aramoto; Yoichi Yuyama; Akihiko Higuchi; Hidetoshi Onodera (ASP-DAC, 2005)

A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era. - Kazutoshi Kobayashi; Masao Aramoto; Hidetoshi Onodera (IEICE Trans. Electron., 2005)