A 38-ns 4-Mb DRAM with a battery-backup (BBU) mode. - Yasuhiro Konishi; Katsumi Dosaka; Takahiro Komatsu; Yoshinori Inoue; Masaki Kumanoya; Youichi Tobita; Hideki Genjyo; Masao Nagatomo; Tsutomu Yoshihara (IEEE J. Solid State Circuits, 1990)