Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance. - Yuxi Tan; Masaru Nishimura; Riadh Ben Abdelhamid; Bingjie Guo; Qixiang Gao; Yoshiki Yamaguchi (HEART, 2024)

Scalable dual-instruction multiple-data processing on an efficient systolic-array architecture. - Yuxi Tan; Riadh Ben Abdelhamid; Bingjie Guo; Qixiang Gao; Masaru Nishimura; Yoshiki Yamaguchi (IPDPS (Workshops), 2024)