A neural inverse function for automatic test pattern generation using strictly digital neural networks. - Masatoshi Arai; Tohru Nakagawa; Hajime Kitagawa (VTS, 1993)

Implementation and Evaluation of a High Speed License Plate Recognition System on an FPGA. - Takamasa Kanamori; Hideharu Amano; Masatoshi Arai; Daisuke Konno; Tomomichi Nanba; Yoshiaki Ajioka (CIT, 2007)

A High Speed License Plate Recognition System on an FPGA. - Takamasa Kanamori; Hideharu Amano; Masatoshi Arai; Daisuke Konno; Tomomichi Nanba; Yoshiaki Ajioka (FPL, 2007)

Ultra-High-Speed Image Signal Accumulation Sensor. - Takeharu Goji Etoh; Son Dao Vu Truong; Toshiaki Koike-Akino; Toshiro Akino; Kenji Nishi; Masatoshi Kureta; Masatoshi Arai (Sensors, 2010)

Face Image Enhancement Taking into Account Lighting Behavior on a Face. - Masato Tsukada; Chisato Funayama; Masatoshi Arai; Charles Dubout (CAIP (2), 2011)

CLAHE implementation on a low-end FPGA board by high-level synthesis. - Koki Honda; Kaijie Wei; Masatoshi Arai; Hideharu Amano (CANDAR (Workshops), 2020)

Weight Least Square Filter for Improving the Quality of Depth Map on FPGA. - Renzhi Mao; Kaijie Wei; Hideharu Amano; Yuki Kuno; Masatoshi Arai (CANDAR (Workshops), 2021)

CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis. - Koki Honda; Kaijie Wei; Masatoshi Arai; Hideharu Amano (IEICE Trans. Inf. Syst., 2021)

RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA. - Kaijie Wei; Yuki Kuno; Masatoshi Arai; Hideharu Amano (HEART, 2022)

Weighted Least Square Filter for Improving the Quality of Depth Map on FPGA. - Renzhi Mao; Kaijie Wei; Hideharu Amano; Yuki Kuno; Masatoshi Arai (Int. J. Netw. Comput., 2022)

RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability. - Kaijie Wei; Yuki Kuno; Masatoshi Arai; Hideharu Amano (IEICE Trans. Inf. Syst., 2023)