Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems. - Kazuhiro Nakamura; Masatoshi Yamamoto; Kazuyoshi Takagi; Naofumi Takagi (ISCAS, 2008)

A VLSI Architecture for Output Probability Computations of HMM-Based Recognition Systems with Store-Based Block Parallel Processing. - Kazuhiro Nakamura; Masatoshi Yamamoto; Kazuyoshi Takagi; Naofumi Takagi (IEICE Trans. Inf. Syst., 2010)

NBRP databases: databases of biological resources in Japan. - Yukiko Yamazaki; Ryo Akashi; Yutaka Banno; Takashi Endo; Hiroshi Ezura; Kaoru Fukami-Kobayashi; Kazuo Inaba; Tadashi Isa; Katsuhiko Kamei; Fumie Kasai; Masatomo Kobayashi; Nori Kurata; et al. (Nucleic Acids Res., 2010)

A VLSI Architecture with Multiple Fast Store-Based Block Parallel Processing for Output Probability and Likelihood Score Computations in HMM-Based Isolated Word Recognition. - Kazuhiro Nakamura; Ryo Shimazaki; Masatoshi Yamamoto; Kazuyoshi Takagi; Naofumi Takagi (IEICE Trans. Electron., 2012)