A 0.1- mu A standby current, ground-bounce-immune 1-Mbit CMOS SRAM. - Manabu Ando; Takeshi Okazawa; Hiroshi Furuta; Masayoshi Ohkawa; Junji Monden; Noriaki Kodama; Kazuhiko Abe; Hiroyasu Ishihara; Isao Sasaki (IEEE J. Solid State Circuits, 1989)

A 15-ns 4-Mb CMOS SRAM. - Shingo Aizaki; Toshiyuki Shimizu; Masayoshi Ohkawa; Kazuhiko Abe; Akane Aizaki; Manabu Ando; Osamu Kudoh; Isao Sasaki (IEEE J. Solid State Circuits, 1990)

A 3.3-V 12-ns 16-Mb CMOS SRAM. - Hiroyuki Goto; Hiroaki Ohkubo; Kenji Kondou; Masayoshi Ohkawa; Hitoshi Mitani; Shinichi Horiba; Masakazu Soeda; Fumihiko Hayashi; Yutaro Hachiya; Toshiyuki Shimizu; Manabu Ando; Zensuke Matsuda (IEEE J. Solid State Circuits, 1992)

A 98 mm2 die size 3.3-V 64-Mb flash memory with FN-NOR type four-level cell. - Masayoshi Ohkawa; Hiroshi Sugawara; Naoaki Sudo; Masaru Tsukiji; Ken-ichiro Nakagawa; Masato Kawata; Ken-ichi Oyama; Toshio Takeshima; Shuichi Ohya (IEEE J. Solid State Circuits, 1996)