A 9-ns 16-Mb CMOS SRAM with offset-compensated current sense amplifier. - Katsunori Seno; Kurt Knorpp; Lee-Lean Shu; Naoki Teshima; Hiroki Kihara; Hiroshi Sato; Fumio Miyaji; Minoru Takeda; Masayoshi Sasaki; Yoichi Tomo; Patrick T. Chuang; Kazuyoshi Kobayashi (IEEE J. Solid State Circuits, 1993)