A Hardware Maze Router with Application to Interactive Rip-Up and Reroute. - Kei Suzuki; Yusuke Matsunaga; Masayoshi Tachibana; Tatsuo Ohtsuki (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

High performance I/O processors for real-time pulse handling. - Masayoshi Tachibana; Yoshihisa Kondo; Yasuo Yamada; Masafumi Takahashi; Haruyuki Tago (ICCD, 1989)

Simultaneous impulse stimulation and response sampling technique for built-in self test of linear analog integrated circuits. - Wimol San-Um; Masayoshi Tachibana (SBCCI, 2009)

A low-jitter supply-regulated charge pump phase-locked loop with built-in test and calibration. - Wimol San-Um; Masayoshi Tachibana (ISCAS, 2010)

A Fault Signature Characterization Based Analog Circuit Testing Scheme and the Extension of IEEE 1149.4 Standard. - Wimol San-Um; Masayoshi Tachibana (IEICE Trans. Inf. Syst., 2010)

A BIST scheme for operational amplifier by checking the stable output of transient response. - Jun Yuan; Masayoshi Tachibana (ECCTD, 2011)

A common-mode BIST technique for fully-differential sample-and-hold circuits. - Jun Yuan; Masayoshi Tachibana (IEICE Electron. Express, 2012)

A resistance matching based self-testable current-mode R-2R digital-to-analog converter. - Jun Yuan; Masayoshi Tachibana (IEICE Electron. Express, 2013)

True Random Number Generator based on compact chaotic oscillator. - Nattagit Jiteurtragool; Chatchai Wannaboon; Masayoshi Tachibana (ISCIT, 2015)

An autonomous chaotic oscillator based on hyperbolic tangent nonlinearity. - Chatchai Wannaboon; Masayoshi Tachibana (ISCIT, 2015)

A simple current-reversible chaotic jerk circuit using inherent tanh(x) of an opamp. - Patinya Ketthong; Wimol San-Um; Banlue Srisuchinwong; Masayoshi Tachibana (IEICE Electron. Express, 2017)

Robustification of a One-Dimensional Generic Sigmoidal Chaotic Map with Application of True Random Bit Generation. - Nattagit Jiteurtragool; Masayoshi Tachibana; Wimol San-Um (Entropy, 2018)

Phase difference analysis technique for parametric faults BIST in CMOS analog circuits. - Chatchai Wannaboon; Nattagit Jiteurtragool; Wimol San-Um; Masayoshi Tachibana (IEICE Electron. Express, 2018)