A 9 ps DNL/INL/RMS FPGA-Based Sigma Accumulation TDC with Unlimited Dynamic Range for Time-Based Analog Front End Applications. - Masayoshi Todorokihara (IEEE SENSORS, 2021)

Improvement of Anomaly Detection Through Enhanced Feature Extraction in TimesNet. - Hiroyoshi Nagahama; Michifumi Yoshioka; Katsufumi Inoue; Masayoshi Todorokihara; Keishi Omori (DCAI (1), 2024)