VTH-hopping scheme for 82% power saving in low-voltage processors. - Koichi Nose; Masayuki Hirabayashi; Hiroshi Kawaguchi 001; Seongsoo Lee; Takayasu Sakurai (CICC, 2001)

Design methodology and optimization strategy for dual-VTH scheme using commercially available tools. - Masayuki Hirabayashi; Koichi Nose; Takayasu Sakurai (ISLPED, 2001)

VTH-hopping scheme to reduce subthreshold leakage for low-power processors. - Koichi Nose; Masayuki Hirabayashi; Hiroshi Kawaguchi 001; Seongsoo Lee; Takayasu Sakurai (IEEE J. Solid State Circuits, 2002)