A 29-ns 64-Mb DRAM with hierarchical array architecture. - Masayuki Nakamura; Tugio Takahashi; Takesada Akiba; Goro Kitsukawa; Makoto Morino; Toshihiro Sekiguchi; Isamu Asano; Katsuo Komatsuzaki; Yoshitaka Tadaki; Songsu Cho; Kazuhiko Kajigaya; Tadashi Tachibana; et al. (IEEE J. Solid State Circuits, 1996)

A dual-phase-controlled dynamic latched amplifier for high-speed and low-power DRAMs. - Hiroki Fujisawa; Tsugio Takahashi; Masayuki Nakamura; Kazuhiko Kajigaya (IEEE J. Solid State Circuits, 2001)

A multigigabit DRAM technology with 6F2 open-bitline cell, distributed overdriven sensing, and stacked-flash fuse. - Tsugio Takahashi; Tomonori Sekiguchi; Riichiro Takemura; Seiji Narui; Hiroki Fujisawa; Shinichi Miyatake; Makoto Morino; Koji Arai; Satoru Yamada; Shoji Shukuri; Masayuki Nakamura; Yoshitaka Tadaki; et al. (IEEE J. Solid State Circuits, 2001)

Improvement of Boosting Algorithm by Modifying the Weighting Rule. - Masayuki Nakamura; Kuniaki Uehara (AI&M, 2002)

A low-impedance open-bitline array for multigigabit DRAM. - Tomonori Sekiguchi; Kiyoo Itoh 001; Tsugio Takahashi; Masahiro Sugaya; Hiroki Fujisawa; Masayuki Nakamura; Kazuhiko Kajigaya; Katsutaka Kimura (IEEE J. Solid State Circuits, 2002)

Study on a noise reduction system of CATV network upstream for data communication. - Masayuki Nakamura; Yuying Yang; Katsumi Wasaki; Yasunari Shidama (ICCCN, 2003)

A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer. - Tatsuya Matano; Yasuhiro Takai; Tsugio Takahashi; Yuusuke Sakito; Isamu Fujii; Yoshihiro Takaishi; Hiroki Fujisawa; Shuichi Kubouchi; Seiji Narui; Koji Arai; Makoto Morino; Masayuki Nakamura; et al. (IEEE J. Solid State Circuits, 2003)

Improvement of Boosting Algorithm by Modifying the Weighting Rule. - Masayuki Nakamura; Hiroki Nomiya; Kuniaki Uehara (Ann. Math. Artif. Intell., 2004)

Is methodology the highway out of verification hell? - Francine Bacchini; Gabe Moretti; Harry Foster; Janick Bergeron; Masayuki Nakamura; Shrenik Mehta; Laurent Ducousso (DAC, 2005)

1.8-V 800-Mb/s/pin DDR2 and 2.5-V 400-Mb/s/pin DDR1 compatibly designed 1Gb SDRAM with dual-clock input-latch scheme and hybrid multi-oxide output buffer. - Hiroki Fujisawa; Masayuki Nakamura; Yasuhiro Takai; Yasuji Koshikawa; Tatsuya Matano; Seiji Narui; Narikazu Usuki; Chiaki Dono; Shinichi Miyatake; Makoto Morino; Koji Arai; Shuichi Kubouchi; et al. (IEEE J. Solid State Circuits, 2005)

An 8.4ns Column-Access 1.3Gb/s/pin DDR3 SDRAM with an 8: 4 Multiplexed Data-Transfer Scheme. - Hiroki Fujisawa; Shuichi Kubouchi; Koji Kuroki; Naohisa Nishioka; Yoshiro Riho; Hiromasa Noda; Isamu Fujii; Hideyuki Yoko; Ryuuji Takishita; Takahiro Ito; Hitoshi Tanaka; Masayuki Nakamura (ISSCC, 2006)

Improved Collaborative Environment Control Using Mote-based Sensor/Actuator Networks. - Masayuki Nakamura; Atsushi Sakurai; Toshio Watanabe; Jiro Nakamura; Hiroshi Ban (LCN, 2006)

An 8.1-ns Column-Access 1.6-Gb/s/pin DDR3 SDRAM With an 8: 4 Multiplexed Data-Transfer Scheme. - Hiroki Fujisawa; Shuichi Kubouchi; Koji Kuroki; Naohisa Nishioka; Yoshiro Riho; Hiromasa Noda; Isamu Fujii; Hideyuki Yoko; Ryuuji Takishita; Takahiro Ito; Hitoshi Tanaka; Masayuki Nakamura (IEEE J. Solid State Circuits, 2007)

Adaptive sensor/actuator networks for tracking environment control behaviors. - Masayuki Nakamura; Atsushi Sakurai; Takumi Yamada; Jiro Nakamura (CSTST, 2008)

Development of Long-Range and High-Speed Wireless LAN for the Transmission of Telemedicine from Disaster Areas. - Masayuki Nakamura; Shoshin Kubota; Hideaki Takagi; Kiyoshi Einaga; Masashi Yokoyama; Katsuto Mochizuki; Masaomi Takizawa; Sumio Murase (EURASIP J. Wirel. Commun. Netw., 2008)

Collaborative processing in Mote-based sensor/actuator networks for environment control application. - Masayuki Nakamura; Atsushi Sakurai; Shizuo Furubo; Hiroshi Ban (Signal Process., 2008)

Distributed Environment Control Using Wireless Sensor/Actuator Networks for Lighting Applications. - Masayuki Nakamura; Atsushi Sakurai; Jiro Nakamura (Sensors, 2009)

Collaborative Processing of Wearable and Ambient Sensor System for Blood Pressure Monitoring. - Masayuki Nakamura; Jiro Nakamura; Guillaume Lopez; Masaki Shuzo; Ichiro Yamada (Sensors, 2011)

Proposal of Web Framework for Ubiquitous Sensor Network and Its Trial Application Using NO2 Sensor Mounted on Bicycle. - Takayuki Nakamura; Yukio Kikuya; Yutaka Arakawa; Motonori Nakamura; Yuka Higashijima; Yasuko Yamada Maruo; Masayuki Nakamura (SAINT, 2012)

Energy-aware resource management of virtual machines under thermal and placement constraints. - Hideaki Hashimoto; Keigo Matsuo; Kazuaki Chikira; Masayuki Nakamura; Joji Urata (IGCC, 2014)

The Digital Reminiscence Method: Effect on Dementia in Japanese Day Care Centers. - Masayuki Nakamura; Takashi Yoshikawa; Kayo Tanaka; Mengyuan Liao; Noriaki Kuwahara (HCI (17), 2015)

Needle Tip Position Accuracy Evaluation Experiment for Puncture Robot in Remote Center Control. - Kohei Sugiyama; Takayuki Matsuno; Tetsushi Kamegawa; Takao Hiraki; Hirotaka Nakaya; Masayuki Nakamura; Akira Yanou; Mamoru Minami (J. Robotics Mechatronics, 2016)