A Majority-Based Control Scheme for Way-Adaptable Caches. - Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (Facing the Multicore-Challenge, 2010)

A voting-based working set assessment scheme for dynamic cache resizing mechanisms. - Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (ICCD, 2010)

A capacity-efficient insertion policy for dynamic cache resizing mechanisms. - Masayuki Sato 001; Yusuke Tobo; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (Conf. Computing Frontiers, 2012)

Vertically integrated processor and memory module design for vector supercomputers. - Ryusuke Egawa; Masayuki Sato 001; Jubee Tada; Hiroaki Kobayashi (3DIC, 2013)

A flexible insertion policy for dynamic cache resizing mechanisms. - Masayuki Sato 001; Yusuke Tobo; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (COOL Chips, 2013)

A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts. - Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (IEICE Trans. Inf. Syst., 2013)

On-chip checkpointing with 3D-stacked memories. - Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (3DIC, 2014)

An energy optimization method for vector processing mechanisms. - Ye Gao; Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (COOL Chips, 2014)

MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications. - Ye Gao; Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (IEICE Trans. Inf. Syst., 2014)

An energy-efficient dynamic memory address mapping mechanism. - Masayuki Sato 001; Chengguang Han; Kazuhiko Komatsu; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (COOL Chips, 2015)

FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms. - Masayuki Sato 001; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (IEICE Trans. Electron., 2015)

A power-aware LLC control mechanism for the 3D-stacked memory system. - Ryusuke Egawa; Wataru Uno; Masayuki Sato 001; Hiroaki Kobayashi; Jubee Tada (3DIC, 2016)

A cache partitioning mechanism to protect shared data for CMPs. - Masayuki Sato 001; Shin Nishimura; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi (COOL Chips, 2016)

An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches. - Masayuki Sato 001; Zentaro Sakai; Ryusuke Egawa; Hiroaki Kobayashi (COOL Chips, 2017)

An application-adaptive data allocation method for multi-channel memory. - Takuya Toyoshima; Masayuki Sato 001; Ryusuke Egawa; Hiroaki Kobayashi (COOL Chips, 2017)

An Adaptive Demotion Policy for High-Associativity Caches. - Jubee Tada; Masayuki Sato 001; Ryusuke Egawa (HEART, 2017)

An energy-aware set-level refreshing mechanism for eDRAM last-level caches. - Masayuki Sato 001; Zehua Li; Ryusuke Egawa; Hiroaki Kobayashi (COOL CHIPS, 2018)

Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor. - Kazuhiko Komatsu; Takumi Kishitani; Masayuki Sato 001; Akihiro Musa; Hiroaki Kobayashi (MCSoC, 2018)

Performance evaluation of a vector supercomputer SX-aurora TSUBASA. - Kazuhiko Komatsu; Shintaro Momose; Yoko Isobe; Osamu Watanabe; Akihiro Musa; Mitsuo Yokokawa; Toshikazu Aoyama; Masayuki Sato 001; Hiroaki Kobayashi (SC, 2018)

An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches. - Masayuki Sato 001; Yoshiki Shoji; Zentaro Sakai; Ryusuke Egawa; Hiroaki Kobayashi (IEEE Trans. Multi Scale Comput. Syst., 2018)

Perceptron-based Cache Bypassing for Way-Adaptable Caches. - Masayuki Sato 001; Yongcheng Chen; Haruya Kikuchi; Kazuhiko Komatsu; Hiroaki Kobayashi (COOL CHIPS, 2019)

A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism. - Ryusuke Egawa; Ryoma Saito; Masayuki Sato 001; Hiroaki Kobayashi (HEART, 2019)

Performance Evaluation of Tsunami Inundation Simulation on SX-Aurora TSUBASA. - Akihiro Musa; Takashi Abe; Takumi Kishitani; Takuya Inoue; Masayuki Sato 001; Kazuhiko Komatsu; Yoichi Murashima; Shunichi Koshimura; Hiroaki Kobayashi (ICCS (2), 2019)

An Appropriate Computing System and Its System Parameters Selection Based on Bottleneck Prediction of Applications. - Kazuhiko Komatsu; Takumi Kishitani; Masayuki Sato 001; Hiroaki Kobayashi (IPDPS Workshops, 2019)

A Hardware Prefetching Mechanism for Vector Gather Instructions. - Hikaru Takayashiki; Masayuki Sato 001; Kazuhiko Komatsu; Hiroaki Kobayashi (IA3@SC, 2019)

Optimizing Memory Layout of Hyperplane Ordering for Vector Supercomputer SX-Aurora TSUBASA. - Osamu Watanabe; Yuta Hougi; Kazuhiko Komatsu; Masayuki Sato 001; Akihiro Musa; Hiroaki Kobayashi (MCHPC@SC, 2019)

An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems. - Masayuki Sato 001; Takuya Toyoshima; Hikaru Takayashiki; Ryusuke Egawa; Hiroaki Kobayashi (Supercomput. Front. Innov., 2019)

A Skewed Multi-banked Cache for Many-core Vector Processors. - Hikaru Takayashiki; Masayuki Sato 001; Kazuhiko Komatsu; Hiroaki Kobayashi (Supercomput. Front. Innov., 2019)

Optimization of the Himeno Benchmark for SX-Aurora TSUBASA. - Akito Onodera; Kazuhiko Komatsu; Soya Fujimoto; Yoko Isobe; Masayuki Sato 001; Hiroaki Kobayashi (Bench, 2020)

Energy-efficient Design of an STT-RAM-based Hybrid Cache Architecture. - Masayuki Sato 001; Xue Hao; Kazuhiko Komatsu; Hiroaki Kobayashi (COOL CHIPS, 2020)

Combinatorial Clustering Based on an Externally-Defined One-Hot Constraint. - Masahito Kumagai; Kazuhiko Komatsu; Fumiyo Takano; Takuya Araki; Masayuki Sato 001; Hiroaki Kobayashi (CANDAR, 2020)

An Efficient Skinny Matrix-Matrix Multiplication Method by Folding Input Matrices into Tensor Core Operations. - Hao Tang; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (CANDAR (Workshops), 2020)

Importance of Selecting Data Layouts in the Tsunami Simulation Code. - Takumi Kishitani; Kazuhiko Komatsu; Masayuki Sato 001; Akihiro Musa; Hiroaki Kobayashi (IPDPS Workshops, 2020)

A Deep Reinforcement Learning Based Feature Selector. - Yiran Cheng; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (PAAP, 2020)

A Dynamic Parameter Tuning Method for High Performance SpMM. - Bin Qi; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (PDCAT, 2020)

An Externally-Constrained Ising Clustering Method for Material Informatics. - Kazuhiko Komatsu; Masahito Kumagai; Ji Qi; Masayuki Sato 001; Hiroaki Kobayashi (CANDAR (Workshops), 2021)

A Processor Selection Method based on Execution Time Estimation for Machine Learning Programs. - Kou Murakami; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (IPDPS Workshops, 2021)

Ising-Based Combinatorial Clustering Using the Kernel Method. - Masahito Kumagai; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (MCSoC, 2021)

Optimizations of a Linear Matrix Solver in a Composite Simulation for a Vector Computer. - Zhilin He 006; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (PAAP, 2021)

Register Flush-free Runahead Execution for Modern Vector Processors. - Hikaru Takayashiki; Masayuki Sato 001; Kazuhiko Komatsu; Hiroaki Kobayashi (SBAC-PAD, 2021)

An External Definition of the One-Hot Constraint and Fast QUBO Generation for High-Performance Combinatorial Clustering. - Masahito Kumagai; Kazuhiko Komatsu; Fumiyo Takano; Takuya Araki; Masayuki Sato 001; Hiroaki Kobayashi (Int. J. Netw. Comput., 2021)

Efficient Mixed-Precision Tall-and-Skinny Matrix-Matrix Multiplication for GPUs. - Hao Tang; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (Int. J. Netw. Comput., 2021)

Performance and Power Analysis of a Vector Computing System. - Kazuhiko Komatsu; Akito Onodera; Erich Focht; Soya Fujimoto; Yoko Isobe; Shintaro Momose; Masayuki Sato 001; Hiroaki Kobayashi (Supercomput. Front. Innov., 2021)

Optimizing Load Balance in a Parallel CFD Code for a Large-scale Turbine Simulation on a Vector Supercomputer. - Osamu Watanabe; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (Supercomput. Front. Innov., 2021)

An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. - Ken Nakamura; Yuya Omori; Daisuke Kobayashi; Koyo Nitta; Kimikazu Sano; Masayuki Sato 001; Hiroe Iwasaki; Hiroaki Kobayashi (COOL CHIPS, 2022)

A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders. - Masayuki Sato 001; Yuya Omori; Ryusuke Egawa; Ken Nakamura; Daisuke Kobayashi; Hiroe Iwasaki; Kazuhiko Komatsu; Hiroaki Kobayashi (PDCAT, 2022)

Page-Address Coalescing of Vector Gather Instructions for Efficient Address Translation. - Hikaru Takayashiki; Masayuki Sato 001; Kazuhiko Komatsu; Hiroaki Kobayashi (IA3@SC, 2022)

A Metadata Prefetching Mechanism for Hybrid Memory Architectures. - Shunsuke Tsukada; Hikaru Takayashiki; Masayuki Sato 001; Kazuhiko Komatsu; Hiroaki Kobayashi (IEICE Trans. Electron., 2022)

Performance Evaluation of Tsunami Evacuation Route Planning on Multiple Annealing Machines. - Yihui Liu; Kazuhiko Komatsu; Masahito Kumagai; Masayuki Sato 001; Hiroaki Kobayashi (CF, 2023)

Multi-scale Loss based Electron Microscopic Image Pair Matching Method. - Chunting Duan; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (ICMLA, 2023)

Appropriate Graph-Algorithm Selection for Edge Devices Using Machine Learning. - Yusuke Fukasawa; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (MCSoC, 2023)

A Constraint Partition Method for Combinatorial Optimization Problems. - Makoto Onoda; Kazuhiko Komatsu; Masahito Kumagai; Masayuki Sato 001; Hiroaki Kobayashi (MCSoC, 2023)

A dynamic parameter tuning method for SpMM parallel execution. - Bin Qi; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (Concurr. Comput. Pract. Exp., 2023)

Ising-Based Kernel Clustering. - Masahito Kumagai; Kazuhiko Komatsu; Masayuki Sato 001; Hiroaki Kobayashi (Algorithms, 2023)

An Efficient Reference Image Sharing Method for the Image-Division Parallel Video Encoding Architecture. - Ken Nakamura; Yuya Omori; Daisuke Kobayashi; Koyo Nitta; Kimikazu Sano; Masayuki Sato 001; Hiroe Iwasaki; Hiroaki Kobayashi (IEICE Trans. Electron., 2023)

A Graph-based Molecular Structure Identification Method via Feature Extraction for Three-dimensional Electron Diffraction Data. - Yusuke Fukasawa; Kazuhiko Komatsu; Masayuki Sato 001; Saori Maki-Yonekura; Hirofumi Kurokawa; Koji Yonekura; Hiroaki Kobayashi (CANDARW, 2024)

Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding. - Karin Onouchi; Masayuki Sato 001; Hiroe Iwasaki; Kazuhiko Komatsu; Hiroaki Kobayashi (CANDAR, 2024)

A Fast Block Partitioning Decision Method Using Luminance Textures for VVC Encoders. - Rikita Uchiyama; Karin Onouchi; Naoya Niwa; Masayuki Sato 001; Hiroaki Kobayashi; Hiroe Iwasaki (ICCE, 2025)

A Compressed QUBO Format for Traveling Salesperson Problems. - Chu-Yuan Huang; Kazuhiko Komatsu; Makoto Onoda; Masahito Kumagai; Masayuki Sato 001; Hiroaki Kobayashi (IPDPS (Workshops), 2025)

Performance Evaluation of Vector Annealing on Multiple Nodes Using the Traveling Salesperson Problem. - Makoto Onoda; Kazuhiko Komatsu; Kotaro Bannai; Shintaro Momose; Masayuki Sato 001; Hiroaki Kobayashi (ISC, 2025)