Design of a Small-Offset 12-Bit CMOS DAC Using Weighted Mean Sample-and-Hold Circuit. - Masayuki Uno; Shoji Kawahito (IEICE Trans. Electron., 2006)

An offset compensated class-AB sample-and-hold amplifier using two sampling capacitors. - Masayuki Uno; Shoji Kawahito (IEICE Electron. Express, 2008)

A 3.96μm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter Capture. - Song Chen; Chiao Liu; Lyle Bainbridge; Qing Chao; Ramakrishna Chilukuri; Wei Gao; Andrew P. Hammond; Tsung-Hsun Tsai; Ken Miyauchi; Isao Takayanagi; Masato Nagamatsu; Hirofumi Abe; et al. (VLSI Technology and Circuits, 2023)

6.4 A 400×400 3.24µm 117dB-Dynamic-Range 3-Layer Stacked Digital Pixel Sensor. - Tsung-Hsun Tsai; Kwuang-Han Chang; Andrew Berkovich; Raffaele Capoccia; Song Chen; Zhao Wang; Chiao Liu; Yi-Hsuan Lin; Sheng-Yeh Lai; Hao-Ming Hsu; Hirofumi Abe; Kazuya Mori; et al. (ISSCC, 2025)

A 3.96-μm, 124-dB Dynamic-Range, Digital-Pixel Sensor With Triple- and Single-Quantization Operations for Monochrome and Near-Infrared Dual-Channel Global Shutter Operation. - Ken Miyauchi; Masayuki Uno; Toshiyuki Isozaki; Hideyuki Fukuhara; Kazuya Mori; Hirofumi Abe; Masato Nagamatsu; Rimon Ikeno; Isao Takayanagi; Hsin-Li Chen; Chih-Hao Lin; Wen-Chien Fu; et al. (IEEE J. Solid State Circuits, 2025)