A 1.6 Gbyte/s data transfer rate 8 Mb embedded DRAM. - Shinji Miyano; Kenji Numata; Katsuhiko Sato; Tomoaki Yabe; Masaharu Wada; Ryo Haga; Motohiro Enkaku; Masazumi Shiochi; Yutaka Kawashima; Masayuki Iwase; Masahisa Ohgata; Junpei Kumagai; et al. (IEEE J. Solid State Circuits, 1995)

A 6-bit arbitrary digital noise emulator in 65nm CMOS technology. - Tetsuro Matsuno; Daisuke Fujimoto; Daisuke Kosaka; Naoyuki Hamanishi; Ken Tanabe; Masazumi Shiochi; Makoto Nagata (CICC, 2009)

An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology. - Tetsuro Matsuno; Daisuke Fujimoto; Daisuke Kosaka; Naoyuki Hamanishi; Ken Tanabe; Masazumi Shiochi; Makoto Nagata (IEICE Trans. Electron., 2010)