Breaking the simulation barrier: SRAM evaluation through norm minimization. - Lara Dolecek; Masood Qazi; Devavrat Shah; Anantha P. Chandrakasan (ICCAD, 2008)

Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. - Masood Qazi; Mehul Tikekar; Lara Dolecek; Devavrat Shah; Anantha P. Chandrakasan (DATE, 2010)

A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS. - Masood Qazi; Kevin Stawiasz; Leland Chang; Anantha P. Chandrakasan (ISSCC, 2010)

A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS. - Masood Qazi; Michael Clinton; Steven Bartling; Anantha P. Chandrakasan (ISSCC, 2011)

Challenges and Directions for Low-Voltage SRAM. - Masood Qazi; Mahmut E. Sinangil; Anantha P. Chandrakasan (IEEE Des. Test Comput., 2011)

A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS. - Masood Qazi; Kevin Stawiasz; Leland Chang; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2011)

A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin. - Masood Qazi; Michael Clinton; Steven Bartling; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2012)

Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems. - Mahmut E. Sinangil; Marcus Yip; Masood Qazi; Rahul Rithe; Joyce Kwong; Anantha P. Chandrakasan (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Circuit design for embedded memory in low-power integrated circuits. - Masood Qazi (2012)

40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS. - Sunghyun Park 002; Masood Qazi; Li-Shiuan Peh; Anantha P. Chandrakasan (DATE, 2013)

A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems. - Masood Qazi; Ajith Amerasekera; Anantha P. Chandrakasan (ISSCC, 2013)

Technique for Efficient Evaluation of SRAM Timing Failure. - Masood Qazi; Mehul Tikekar; Lara Dolecek; Devavrat Shah; Anantha P. Chandrakasan (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems. - Masood Qazi; Ajith Amerasekera; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2014)